IP Library Granted Patent US 11,631,786
Granted Patent B2
US 11,631,786 · App. 17/190,781 · Granted Apr 18, 2023

III-nitride multi-wavelength LED arrays with etch stop layer

Inventors: Robert Armitage (Cupertino, CA); Isaac Wildeson (San Jose, CA)
Assignee: Lumileds LLC
H01L33/32H01L27/153H01L33/0025H01L33/0075H01L33/06H01L33/502H05B45/30
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Quick Facts
Patent No.
US 11,631,786
App. No.
17/190,781
Granted
Apr 18, 2023
Kind
B2
Abstract

An LED array comprises a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a tunnel junction on the first LED, a second n-type layer on the tunnel junction, the second n-type layer comprising at least one n-type III-nitride layer with >10% Al mole fraction and at least one n-type III-nitride layer with <10% Al mole fraction. The LED array further comprises an adjacent mesa comprising a top surface, the first LED, a second LED including the second n-type layer, a second p-type layer and a second color active region. A first trench separates the first mesa and the adjacent mesa, cathode metallization in the first trench and in electrical contact with the first and the second color active regions of the adjacent mesa, and anode metallization contacts on the n-type layer of the first mesa and on the anode layer of the adjacent mesa. The devices and methods for their manufacture include a thin film transistor (TFT).

Claims (41)

1. A light emitting diode (LED) array comprising:

a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a first tunnel junction on the first LED, the top surface of the first mesa comprising a second n-type layer on the first tunnel junction, the second n-type layer comprising at least one n-type III-nitride layer with >10% Al mole fraction and at least one n-type III-nitride layer with <10% Al mole fraction;

an adjacent mesa comprising a top surface, the first LED, a second LED including the second n-type layer, a second p-type layer, and a second color active region;

a second tunnel junction on the second LED of the adjacent mesa, and a third n-type layer on the second tunnel junction of the adjacent mesa;

a first trench separating the first mesa and the adjacent mesa;

anode metallization contacts on the second n-type layer of the first mesa and on the top surface of the adjacent mesa;

a third color active region on the n-type layer of the adjacent mesa and the adjacent mesa comprises a top surface including a third p-type layer;

a third mesa comprising the first LED, second LED, the second tunnel junction, and the third n-type layer on the second tunnel junction;

a second trench separating the adjacent mesa and the third mesa;

cathode metallization in the first trench and in electrical contact with the first color active region and the second color active region of the adjacent mesa;

cathode metallization in the second trench and in electrical contact with the first color active region and the second color active region of the third mesa and the cathode metallization in the first trench in electrical contact with the first color active region, the second color active region and the third color active region of the adjacent mesa; and

an anode metallization contact on the third n-type layer of the third mesa.

2. The LED array of claim 1 , wherein the third p-type layer of the adjacent mesa is a non-etched p-type layer.

3. The LED array of claim 1 , wherein the first color active region is a blue color active region and the second color active region is a green color active region.

4. The LED array of claim 1 , wherein the first color active region is a blue color active region, the second color active region is a green color active region and the third color active region is a red color active region.

5. The LED array of claim 1 , wherein the first p-type layer, the second p-type layer, and the first n-type layer comprise a III-nitride material.

6. The LED array of claim 5 , wherein the III-nitride material comprises GaN.

7. The LED array of claim 1 , wherein the first p-type layer, the second p-type layer, the third p-type layer, the first n-type layer, the first n-type layer, and the third n-type layer comprise a III-nitride material.

8. The LED array of claim 7 , wherein the III-nitride material comprises GaN.

9. The LED array of claim 1 , wherein the first mesa has a sidewall and the adjacent mesa has a sidewall and the first mesa sidewall and the adjacent mesa sidewall form an angle with a top surface of a substrate upon which the mesas are formed in a range of from 60 to less than 90 degrees.

10. The LED array of claim 1 , wherein the n-type III-nitride layer with >10% Al mole fraction has a molecular formula Al x Ga 1-x N, where x is in a range of from 0.20 to 0.25.

11. The LED array of claim 1 , further comprising a thin film transistor (TFT) driver comprising a driving transistor having a first electrode connected to a V DD line and a second electrode, a capacitor being connected to the second electrode of the driving transistor and a first electrode being connected to a selecting transistor, and the selecting transistor having the first electrode and a second electrode, the second electrode of the selecting transistor being connected to a data line, wherein the selecting transistor is configured to be controlled by a select line, wherein the second electrode of the driving transistor is connected to one of the anode metallization contacts.

12. An electronic system comprising:

the LED array of claim 1 ; and

driver circuitry configured to provide independent voltages to one or more of anode contacts.

13. The electronic system of claim 12 , wherein the electronic system is selected from the group consisting of a LED-based luminaire, a light emitting strip, a light emitting sheet, an optical display, and a microLED display.

14. A method of manufacturing an LED array, the method comprising:

forming a first mesa comprising a top surface, at least a first LED including a first p-type layer, a first n-type layer and a first color active region and a first tunnel junction on the first LED, the top surface comprising a second n-type layer on the first tunnel junction, the second n-type layer comprising at least one n-type III-nitride layer with >10% Al mole fraction and at least one n-type III-nitride layer with <10% Al mole fraction;

forming an adjacent mesa comprising the first LED, a second LED including the second n-type layer, a second p-type layer and a second color active region;

forming a second tunnel junction on the second LED of the adjacent mesa, and a third n-type layer on the second tunnel junction of the adjacent mesa p-type layer;

forming a first trench separating the first mesa and the adjacent mesa;

forming anode metallization contacts on the second n-type layer of the first mesa and on the third n-type layer of the adjacent mesa;

forming a third color active region on the n-type layer of the adjacent mesa and the adjacent mesa comprises a top surface including a third p-type layer;

forming a third mesa comprising a top surface, the first LED, the second LED, the second tunnel junction, and including the third n-type layer on the second tunnel junction;

and the third color active region, the top surface of the third mesa comprising the third n-type layer;

forming a second trench separating the adjacent mesa and the third mesa;

forming cathode metallization in the first trench which is in electrical contact with the first color active region and the second color active region of the adjacent mesa;

forming cathode metallization in the second trench and in electrical contact with the first color active region and the second color active region of the third mesa and the cathode metallization in the first trench in electrical contact with the first color active region, the second color active region and the third color active region of the second adjacent mesa, and the n-type metallization in the first trench in electrical contact with the third color active region; and

forming an anode metallization contact on the third n-type layer of the third mesa.

15. The method of claim 14 , wherein each of the first LED, the second LED and the third LED comprise epitaxially deposited III-nitride material.

16. The method of claim 15 , wherein the first LED, the second LED and the third LED are formed on a substrate.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 10, 2025
From: LUMILEDS LLC
To: LUMILEDS SINGAPORE PTE. LTD.
Reel/Frame 071888/0086 →
RELEASE OF SECURITY INTEREST Recorded Jan 29, 2025
From: SOUND POINT AGENCY LLC
To: LUMILEDS LLC; LUMILEDS HOLDING B.V.
Reel/Frame 070046/0001 →
SECURITY INTEREST Recorded Jan 5, 2023
From: LUMILEDS LLC; LUMILEDS HOLDING B.V.
To: SOUND POINT AGENCY LLC
Reel/Frame 062299/0338 →
PATENT SECURITY AGREEMENT Recorded Dec 9, 2022
From: LUMILEDS, LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH
Reel/Frame 062114/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 4, 2021
From: ARMITAGE, ROBERT; WILDESON, ISAAC
To: LUMILEDS LLC
Reel/Frame 055490/0787 →
Continuity (2)
Provisional Application 63112920 · Nov 12, 2020
Related Publication 20220149237A1 · May 12, 2022