Light Emitting Diode Devices With Common Electrode
Described are light emitting diode (LED) devices comprising a plurality of mesas defining pixels, each of the plurality of mesas comprising semiconductor layers, an N-contact material in a space between each of the plurality of mesas, a dielectric material which insulates sidewalls of the P-type layer and the active region from the metal. The plurality of mesas defines a matrix of pixels, the matrix of pixels is surrounded by a common electrode comprising a plurality of semiconductor stacks surrounded by a conducting metal. Each of the semiconductor stacks is inactive, and in one or more embodiments, comprises at least one layer of GaN.
1 . A light emitting diode (LED) device comprising:
a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, the semiconductor layers including an N-type layer, an active region, and a P-type layer, each of the mesas having a height less than or equal to their width;
an N-contact material between each of the mesas, the N-contact material providing optical isolation between each of the mesas, and electrically contacting the N-type layer of each of the mesas along sidewalls of the N-type layers;
a first dielectric material which insulates sidewalls of the P-type layer and the active region from the N-contact material; and
the plurality of mesas defining a matrix of pixels, the matrix of pixels surrounded by a common electrode comprising a plurality of semiconductor stacks surrounded by a conducting metal.
2 . The LED device of claim 1 , wherein each of the semiconductor stacks is an inactive semiconductor stack comprising at least one layer of GaN.
3 . The LED device of claim 1 , further comprising a current spreading layer on the P-type layer.
4 . The LED device of claim 3 comprising a multilayer composite film comprising the current spreading layer and a second dielectric layer, the current spreading layer having a first portion and a second portion, and the LED device further comprising:
a hard mask layer above the second portion of the current spreading layer;
a P-metal material plug above the first portion of the current spreading layer;
a passivation layer on the hard mask layer; and
an under bump metallization layer on the passivation layer.
5 . The LED device of claim 4 , wherein a width of the P-metal material plug is in a range of from 2 μm to 30 μm.
6 . The LED device of claim 1 , wherein a pixel pitch of the plurality of mesas is in range of from 5 μm to 100 μm.
7 . The LED device of claim 1 , wherein the semiconductor layers have a thickness in a range of from 2 μm to 10 μm.
8 . The LED device of claim 1 , wherein the first dielectric material is in a form of outer spacers comprising a material selected from the group consisting of SiO 2 , AlO x , and SiN, having a thickness in a range of from 200 nm to 1 μm.
9 . The LED device of claim 1 comprising a trench having a depth from a top surface of the mesa in a range of from 0.5 μm to 2 μm, which contains the N-contact material.
10 . The LED device of claim 1 , wherein each of the mesas includes sidewalls of the semiconductor layers, each having a first segment and a second segment, wherein the first segments of the sidewalls define an angle in a range of from 60 degrees to 90 degrees from a horizontal plane that is parallel with the N-type layer and the P-type layer; and the second segments of the sidewalls form an angle with a top surface of a substrate upon which the mesas are formed in a range of from 75 to less than 90 degrees.
11 . The LED device of claim 1 , wherein the plurality of mesas comprises an array of mesas.
12 . A method of manufacturing a light emitting diode (LED) device comprising:
depositing a plurality of semiconductor layers including an N-type layer, an active region, and a P-type layer on a substrate;
etching a portion of the semiconductor layers to form trenches and plurality of mesas defining a plurality of pixels, each of the plurality of mesas comprising the semiconductor layers and each of the mesas having a height less than or equal to their width;
depositing a first dielectric material in the trenches;
depositing an N-contact material on the first dielectric material, the N-contact material providing optical isolation between each of the mesas, and electrically contacting the N-type layer of each of the mesas along sidewalls of the N-type layers, wherein the dielectric material insulates sidewalls of the P-type layer and the active region from the N-contact material; and
forming a common electrode comprising a plurality of semiconductor stacks surrounded by a conducting metal, the common electrode surrounding the plurality of pixels.
13 . The method of claim 12 , wherein each semiconductor stack is an inactive semiconductor stack comprising at least one layer of GaN.
14 . The method of claim 12 , further comprising forming an array of mesas.
15 . The method of claim 12 , wherein the N-contact material comprises a reflective metal.
16 . The method of claim 12 , wherein a pixel pitch of the plurality of mesas is in range of from 5 μm to 100 μm.
17 . The method of claim 12 , wherein the semiconductor layers have a thickness in a range of from 2 μm to 10 μm.
18 . A light emitting diode (LED) device comprising:
a plurality of mesas defining pixels, each of the mesas comprising semiconductor layers, the semiconductor layers including an N-type layer, an active region, and a P-type layer, each of the mesas having a height less than or equal to their width;
an N-contact material in a space between each of the mesas, the N-contact material providing optical isolation between each of the mesas, and electrically contacting the N-type layer of each of the mesas along sidewalls of the N-type layers;
a first dielectric material which insulates sidewalls of the P-type layer and the active region from the N-contact material;
a current spreading layer on the P-type layer, the current spreading layer having a first portion and a second portion;
a hard mask layer above the second portion of the current spreading layer;
a P-metal material plug above the first portion of the current spreading layer;
a passivation layer on the hard mask layer;
an under bump metallization layer on the passivation layer; and
the plurality of mesas defining a matrix of pixels, the matrix of pixels surrounded by a common electrode comprising a plurality of inactive semiconductor stacks, each semiconductor stack comprising at least one layer of GaN, the plurality of inactive semiconductor stacks being surrounded by a conducting metal.
19 . The LED device of claim 18 , wherein the plurality of mesas comprises an array of mesas.
20 . The LED device of claim 18 , wherein a pixel pitch of the plurality of mesas is in range of from 5 μm to 100 μm.