IP Library Granted Patent US 11,761,936
Granted Patent B2
US 11,761,936 · App. 17/195,027 · Granted Sep 19, 2023

Compact humidity and pressure sensor with temperature control

Inventors: Vivek Saraf (Austin, TX); Vishnu Srinivasan (Austin, TX)
Assignee: pSemi Corporation
G01N33/0031G01K7/20G01L19/0092G01N27/223G01N27/227H01L23/345
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,761,936
App. No.
17/195,027
Granted
Sep 19, 2023
Kind
B2
Abstract

Novel integrated circuit environmental and temperature sensors in combination with measurement circuitry fully integrated as part of an ASIC die, which may be co-packaged with a pressure sensor integrated circuit to create a compact yet sensitive environment monitoring product. Embodiments may include one or more integrated local heating elements and control circuitry that are power supply independent, make efficient use of battery power, include an accurate in-built temperature detection capability, and provide digital close-loop control of the heating elements.

Claims (45)

1. An integrated circuit die including:

(a) a surface layer;

(b) at least one sensor structure formed as part of the surface layer, each sensor structure including:

(1) a first terminal;

(2) a second terminal in spaced relationship with respect to the first terminal; and

(3) an environmentally sensitive material formed between, and optionally around, the first and second terminals, the environmentally sensitive material being responsive to a selected environmental characteristic so as to cause a measurable change in electrical capacitance and/or charge and/or dielectric constant and/or conductance across the sensor structure;

(c) at least one temperature-sensitive sensor formed as part of the surface layer of the integrated circuit die, at least one of the at least one temperature-sensitive sensor including:

(1) a temperature-sensitive subcircuit including two resistors, coupled in series and configured to be coupled between a voltage supply and a reference potential, and a node configured to output a voltage V t that varies as a function of temperature, wherein the node is located between the two resistors; and

(2) a sample-and-hold circuit having an input coupled to the node between the two resistors of the temperature-sensitive subcircuit and configured to output a signal ΔT indicative of a difference between a first temperature indicated by the voltage V t at a first time and a second temperature indicated by the voltage V t at a subsequent second time; and

(d) processing circuitry, coupled to the at least one sensor structure and the at least one temperature-sensitive sensor, the processing circuitry including:

(1) a capacitance analog-to-digital converter configured to receive an analog signal from the at least one sensor structure indicative of a change in capacitance, ΔC, in the at least one sensor structure and convert the received analog signal to a corresponding ΔC digital signal;

(2) a temperature analog-to-digital converter configured to receive an analog signal from the at least one temperature-sensitive sensor indicative of the signal ΔT and convert the received analog signal to a corresponding ΔT digital signal; and

(3) a digital signal processor, coupled to the capacitance analog-to-digital converter and the temperature analog-to-digital converter and configured to generate and output a response based on one or more received ΔC digital signals and on one or more received ΔT digital signals.

2. An integrated circuit die including:

(a) at least one capacitor structure formed as part of a surface layer of the integrated circuit die, each capacitor structure including an environmentally sensitive material as a dielectric, the environmentally sensitive material being responsive to a selected environmental characteristic so as to cause a measurable change in electrical capacitance and/or charge across the capacitor structure;

(b) at least one heating element positioned sufficiently close to an associated one capacitor structure of the at least one capacitor structure to enable localized heating near the associated one capacitor structure;

(c) at least one temperature-sensitive sensor formed as part of the surface layer of the integrated circuit die, at least one of the at least one temperature-sensitive sensor including:

(1) a temperature-sensitive subcircuit including two resistors, coupled in series and configured to be coupled between a voltage supply and a reference potential, and a node configured to output a voltage V t that varies as a function of temperature, wherein the node is located between the two resistors; and

(2) a sample-and-hold circuit having an input coupled to the node between the two resistors of the temperature-sensitive subcircuit and configured to output a signal ΔT indicative of a difference between a first temperature indicated by the voltage V t at a first time and a second temperature indicated by the voltage V t at a subsequent second time; and

(d) processing circuitry, coupled to the at least one capacitor structure and the at least one temperature-sensitive sensor, the processing circuitry including:

(1) a capacitance analog-to-digital converter configured to receive an analog signal from the at least one capacitor structure indicative of a change in capacitance, ΔC, in the at least one capacitor structure and convert the received analog signal to a corresponding ΔC digital signal;

(2) a temperature analog-to-digital converter configured to receive an analog signal from the at least one temperature-sensitive sensor indicative of the signal ΔT and convert the received analog signal to a corresponding ΔT digital signal; and

(3) a digital signal processor, coupled to the capacitance analog-to-digital converter and the temperature analog-to-digital converter and configured to generate and output a response based on one or more received ΔC digital signals and on one or more received ΔT digital signals.

3. The invention of claim 2 , further including a pressure sensor die mounted on the surface layer of the integrated circuit die.

4. The invention of claim 2 , further including at least one environmental sensor for sensing one or more gases and/or one or more vapors, the at least one environmental sensor combined with and coupled to the at least one capacitor structure in a common circuit structure.

5. The invention of claim 2 , wherein the environmentally sensitive dielectric material is responsive to humidity.

6. The invention of claim 2 , wherein the environmentally sensitive dielectric material is responsive to a selected biological or chemical molecule.

7. The invention of claim 2 , wherein the environmentally sensitive material is a polyimide.

8. An integrated circuit die including:

(a) a surface layer;

(b) at least one capacitor structure formed as part of the surface layer, each capacitor structure including:

(1) a first capacitor terminal;

(2) a second capacitor terminal in spaced relationship with respect to the first capacitor terminal; and

(3) an environmentally sensitive dielectric material formed between, and optionally around, the first and second capacitor terminals as a dielectric, the environmentally sensitive dielectric material being responsive to a selected environmental characteristic so as to cause a measurable change in electrical capacitance and/or charge across the capacitor structure;

(c) at least one temperature-sensitive sensor formed as part of the surface layer of the integrated circuit die, at least one of the at least one temperature-sensitive sensor including:

(1) a temperature-sensitive subcircuit including two resistors, coupled in series and configured to be coupled between a voltage supply and a reference potential, and a node configured to output a voltage V t that varies as a function of temperature, wherein the node is located between the two resistors; and

(2) a sample-and-hold circuit having an input coupled to the node between the two resistors of the temperature-sensitive subcircuit and configured to output a signal ΔT indicative of a difference between a first temperature indicated by the voltage V t at a first time and a second temperature indicated by the voltage V t at a subsequent second time; and

(d) a capacitance analog-to-digital converter configured to receive an analog signal from at least one capacitor structure indicative of a change in capacitance, ΔC, in the at least one capacitor structure and convert the received analog signal to a corresponding ΔC digital signal;

(e) a temperature analog-to-digital converter configured to receive an analog signal from the at least one temperature-sensitive sensor indicative of the signal ΔT and convert the received analog signal to a corresponding ΔT digital signal; and

(d) a digital signal processor, coupled to the capacitance analog-to-digital converter and and the temperature analog-to-digital converter and configured to generate and output a response based on one or more received ΔC digital signals and one or more received ΔT digital signals.

9. The invention of claim 8 , further including a pressure sensor die mounted on the surface layer of the integrated circuit die.

10. The invention of claim 8 , further including at least one environmental sensor for sensing one or more gases and/or one or more vapors, the at least one environmental sensor combined with and coupled to the at least one capacitor structure in a common circuit structure.

11. The invention of claim 8 , wherein the environmentally sensitive dielectric material is responsive to humidity.

12. The invention of claim 8 , wherein the environmentally sensitive dielectric material is responsive to a selected biological or chemical molecule.

13. The invention of claim 8 , wherein the environmentally sensitive material is a polyimide.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 14, 2024
From: PSEMI CORPORATION
To: MURATA MANUFACTURING CO., LTD.
Reel/Frame 066597/0427 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 10, 2021
From: SARAF, VIVEK; SRINIVASAN, VISHNU
To: PSEMI CORPORATION
Reel/Frame 057137/0394 →
Continuity (2)
Provisional Application 62987245 · Mar 9, 2020
Related Publication 20210278385A1 · Sep 9, 2021