IP Library Granted Patent US 11,599,480
Granted Patent B2
US 11,599,480 · App. 17/198,538 · Granted Mar 7, 2023

Replacing compromised data in a self-healing system

Inventors: Paul Gryting (Helotes, TX); Cody L. Tankersley (Owens Cross Roads, AL); Nathan T. Palmer (Austin, TX)
Assignee: Raytheon Company
G06F12/1433G06F12/1408G06F12/1441
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Quick Facts
Patent No.
US 11,599,480
App. No.
17/198,538
Granted
Mar 7, 2023
Kind
B2
Abstract

A method for use in a computing system, comprising: storing, in a random-access memory, a working copy of a data item, the working copy of the data item being stored in the random-access memory by a first processor; registering, with a second processor, a respective address in the random-access memory where the working copy of the data item is stored; and correcting, by the second processor, any modifications to the working copy of the data item that are made after the working copy of the data item is stored in the random-access memory, the modifications being corrected in parallel with the first processor executing software based on the working copy of the data item.

Claims (33)

1. A method for use in a computing system, comprising:

storing, in a random-access memory, a working copy of a data item, the working copy of the data item being stored in the random-access memory by a first processor;

registering, with a second processor, a respective address in the random-access memory where the working copy of the data item is stored, wherein registering the respective address includes generating a data structure that identifies the respective address as a location where the working copy of the data item has been stored;

detecting whether the working copy of the data item has been modified based on the data structure, wherein the detecting includes: using the data structure to determine that a working copy of the data item is expected to be stored at the respective address and detecting whether data that is currently stored at the respective address matches a representation of the data item; and

correcting, by the second processor, any modifications to the working copy of the data item that are made after the working copy of the data item is stored in the random-access memory, the modifications being corrected concurrently with the first processor executing software based on the working copy of the data item.

2. The method of claim 1 , wherein correcting any modifications to the working copy of the data item includes storing a secure copy of the data item at the respective address.

3. The method of claim 1 , wherein the representation of the data item includes a secure copy of the data item or a cryptographic code that is associated with the data item.

4. The method of claim 3 , wherein the working copy of the data item and the secure copy of the data item are stored in memory devices that are physically separate from one another.

5. The method of claim 1 , wherein the first processor includes a first core of a central processing unit and the second processor includes a second core of the central processing unit.

6. The method of claim 1 , wherein the first processor includes at least one core of a general-purpose processing unit and the second processor incudes application-specific processing circuitry.

7. The method of claim 1 , wherein the respective address in the random-access memory is registered with the second processor by a driver for the second processor that is executed on the first processor.

8. The method of claim 1 , wherein the modifications are corrected in real-time or near real-time.

9. A system, comprising:

a random-access memory;

a first processor operatively coupled to the random-access memory; and

a second processor that is operatively coupled to the random-access memory;

wherein the first processor is configured to store, at a respective address in the random-access memory, a working copy of a data item, and register, with the second processor, the respective address in the random-access memory where the working copy of the data item is stored, wherein registering the respective address includes generating a data structure that identifies the respective address as a location where the working copy of the data item has been stored; and

wherein the second processor is configured to: (i) detect whether the working copy of the data item has been modified based on the data structure, wherein the detecting includes: using the data structure to determine that a working copy of the data item is expected to be stored at the respective address and detecting whether data that is currently stored at the respective address matches a representation of the data item, and (ii) correct any modifications to the working copy of the data item that are made after the working copy of the data item is stored at the respective address in the random-access memory, the modifications being corrected concurrently with the first processor executing software based on the working copy of the data item.

10. The system of claim 9 , wherein correcting any modifications to the working copy of the data item includes storing a secure copy of the data item at the respective address.

11. The system of claim 9 , wherein the representation of the data item includes a secure copy of the data item or a cryptographic code that is associated with the data item.

12. The system of claim 11 , wherein the working copy of the data item and the secure copy of the data item are stored in memory devices that are physically separate from one another.

13. The system of claim 9 , wherein the first processor includes a first core of a central processing unit and the second processor includes a second core of the central processing unit.

14. The system of claim 9 , wherein the first processor includes at least one core of a general-purpose processing unit and the second processor incudes application-specific processing circuitry.

15. The system of claim 9 , wherein the respective address in the random-access memory is registered with the second processor by a driver for the second processor that is executed on the first processor.

16. The system of claim 9 , wherein the modifications are corrected in real-time or near real-time.

17. A non-transitory computer readable storage medium storing one or more processor executable instructions, which, when executed by a computing system cause the computing system to perform the operations of:

storing, in a random-access memory, a working copy of a data item, the working copy of the data item being stored in the random-access memory by a first processor;

registering, with a second processor, a respective address in the random-access memory where the working copy of the data item is stored, wherein registering the respective address includes generating a data structure that identifies the respective address as a location where the working copy of the data item has been stored;

detecting whether the working copy of the data item has been modified based on the data structure, wherein the detecting includes: using the data structure to determine that a working copy of the data item is expected to be stored at the respective address and detecting whether data that is currently stored at the respective address matches a representation of the data item; and

correcting, by the second processor, any modifications to the working copy of the data item that are made after the working copy of the data item is stored in the random-access memory, the modifications being corrected concurrently with the first processor executing software based on the working copy of the data item.

18. The non-transitory computer readable storage medium of claim 17 , wherein correcting any modifications to the working copy of the data item includes storing a secure copy of the data item at the respective address.

19. The non-transitory computer readable storage medium of claim 17 , wherein the representation of the data item includes a secure copy of the data item or a cryptographic code that is associated with the data item.

20. The non-transitory computer readable storage medium of claim 19 , wherein the working copy of the data item and the secure copy of the data item are stored in memory devices that are physically separate from one another.

Assignments (4)
CHANGE OF NAME Recorded Jul 3, 2024
From: COLUMBUS BUYER LLC
To: NIGHTWING GROUP, LLC
Reel/Frame 068106/0251 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2024
From: RAYTHEON COMPANY
To: COLUMBUS BUYER LLC
Reel/Frame 068233/0420 →
SECURITY INTEREST Recorded Apr 1, 2024
From: COLUMBUS BUYER LLC; RAYTHEON BLACKBIRD TECHNOLOGIES, INC.; RAYTHEON FOREGROUND SECURITY, INC.
To: WELLS FARGO BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 066960/0411 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 15, 2021
From: GRYTING, PAUL; TANKERSLEY, CODY L.; PALMER, NATHAN T.
To: RAYTHEON COMPANY
Reel/Frame 055589/0928 →