System and method for handling in-band interrupts on inactive I3C channels
A multiplexor for an Improved Inter-Integrated Circuit (I3C) network includes a switch, a snooper, and an I3C slave module coupled to an I3C master interface. The switch selectably couples I3C busses to the I3C master interface. Each I3C bus incudes I3C slave interfaces. The selected I3C bus is the active bus, and the non-selected I3C busses are inactive buses. The snooper detects In-Band Interrupts (IBIs) from the I3C slave interfaces coupled to the inactive buses. When the snooper receives a first IBI on an inactive bus, the snooper provides an indication. The I3C slave module provides a second IBI to the I3C master interface in response to the indication.
1. A multiplexor for an Improved Inter-Integrated Circuit (I3C) network, the multiplexor comprising:
a snooper to detect In-Band Interrupts (IBIs) from a plurality of I3C slave interfaces, the snooper configured to receive a first IBI from a first I3C slave interface coupled to a first inactive I3C bus, and to provide an indication when the first IBI is received, the first I3C slave interface having a first I3C address; and
an I3C slave module coupled to the first I3C master interface, and configured to receive the indication and to provide a second IBI to a first I3C master interface coupled to the multiplexor in response to the indication, the I3C slave module having a second I3C address.
2. The multiplexor of claim 1 , wherein, in providing the second IBI, the I3C slave module is further configured to provide the second I3C address to the first I3C master interface.
3. The multiplexor of claim 2 , wherein in providing the second IBI, the I3C slave module is further configured to provide a data payload indicating that the first IBI was provided on the first inactive bus.
4. The multiplexor of claim 3 , wherein the I3C slave module is further configured to receive a reply from the first I3C master interface in response to the second IBI, the reply including an instruction for a switch of the multiplexor to decouple a first active bus from the first I3C master interface and to couple the first inactive bus to the first I3C master interface.
5. The multiplexor of claim 1 , further comprising:
a second I3C master interface configured to determine the first I3C address in response to receiving the first IBI.
6. The multiplexor of claim 5 , wherein the second I3C master interface is further configured to provide the first I3C address to the I3C slave module.
7. The multiplexor of claim 6 , wherein, in providing the second IBI, the I3C slave module is further configured to provide the first I3C address to the second I3C master interface.
8. The multiplexor of claim 7 , wherein the multiplexor is configured to decouple a first active bus from the first I3C master interface and to couple the first inactive bus to the second I3C master interface in response to providing the first I3C address to the second I3C master interface.
9. A method for an improved inter-integrated circuit (I3C) network, the method comprising:
detecting, by a snooper of an I3C multiplexor, a first In-Band Interrupt (IBI) from a first I3C slave interface coupled to a first inactive bus, the first I3C slave interface having a first I3C address;
providing an indication that the first IBI was received;
receiving, by an I3C slave module of the I3C multiplexor, the indication; and
providing a second IBI to a first I3C master interface in response to the indication.
10. The method of claim 9 , wherein, in providing the second IBI, the method further comprises:
providing, by the I3C slave module, the first I3C address to the first I3C master interface.
11. The method of claim 10 , wherein, in providing the second IBI, the method further comprises:
providing, by the I3C slave module, a data payload indicating that the first IBI was provided on the first inactive bus.
12. The method of claim 11 , further comprising:
receiving, by the I3C slave module, a reply from the first I3C master interface in response to the second IBI, the reply including an instruction for a switch to decouple a first active bus from the first I3C master interface and to couple the first inactive bus to the first I3C master interface.
13. The method of claim 9 , further comprising:
determining, by a second I3C master interface of the I3C multiplexor, the first I3C address in response to receiving the first IBI.
14. The method of claim 13 , further comprising:
providing, by the second I3C master, the first I3C address to the I3C slave module.
15. The method of claim 14 , wherein, in providing the second IBI, the method further comprises:
providing, by the I3C slave module, the first I3C address to the second I3C master interface.
16. The method of claim 15 , further comprising:
decoupling, by the I3C multiplexor, a first active bus from the first I3C master interface in response to providing the first I3C address to the second I3C master interface; and
coupling the first inactive bus to the second I3C master interface.
17. An information handling system, comprising:
a first I3C master interface; and
a multiplexor for an I3C network, the multiplexor including:
a snooper to detect In-Band Interrupts (IBIs) from a plurality of I3C slave interfaces, the snooper configured to receive a first IBI from a first I3C slave interface coupled to a first inactive I3C bus, and to provide an indication when the first IBI is received, the first I3C slave interface having a first I3C address; and
an I3C slave module coupled to the first I3C master interface, and configured to receive the indication and to provide a second IBI to a first I3C master interface coupled to the multiplexor in response to the indication, the I3C slave module having a second I3C address.
18. The information handling system of claim 17 , wherein, in providing the second IBI, the I3C slave module is further configured to provide the second I3C address to the first I3C master interface.
19. The information handling system of claim 17 wherein:
the multiplexor further comprises a second I3C master interface configured to determine the first I3C address in response to receiving the first IBI, and to provide the first I3C address to the I3C slave module; and
in providing the second IBI, the I3C slave module is further configured to provide the first I3C address to the second I3C master interface.
20. The information handling system of claim 19 , wherein the multiplexor is configured to decouple a first active bus from the first I3C master interface and to couple the first inactive bus to the second I3C master interface in response to providing the first I3C address to the second I3C master interface.