Load state detection circuit and method

1. A load state detection circuit, comprising: at least one detecting power supply, a voltage sampling circuit, a switch unit, and a microcontroller;

wherein the microcontroller is connected to the switch unit, the switch unit is connected between the detecting power supply and the load to be tested;

wherein a voltage sampling point is formed at either terminal of the load to be tested, and the voltage sampling circuit is connected between the voltage sampling point and the microcontroller;

wherein the voltage sampling circuit is configured to sample a voltage at the voltage sampling point, and output the voltage to the microcontroller;

wherein the microcontroller is configured to, before conductively connecting the load to be tested with the drive power supply, electrically connect the load to be tested and the detecting power supply by controlling the switch unit, and determine whether a fault exists occurring to the load to be tested according to a received voltage at the voltage sampling point sampled by the voltage sampling circuit;

wherein the load state detection circuit further comprises a first voltage divider circuit;

wherein the switch unit is connected to a first terminal of the first voltage divider circuit, a second terminal of the first voltage divider circuit is connected to an terminal of the load to be tested, and a third terminal of the first voltage divider circuit is grounded;

wherein the microcontroller is configured to:

control the switch unit to switch on; and

determine that a grounding short circuit fault occurs to an terminal of the load to be tested where no voltage sampling point is formed when a received voltage at the voltage sampling point is within a first preset range; wherein the first preset range is set according to a resistance of the first voltage divider circuit, an internal resistance of the load to be tested, and a voltage of the detecting power supply.

2. The load state detection circuit according to claim 1 , wherein the microcontroller is configured to:

control the switch unit to switch on; and

determine that a grounding short circuit fault occurs to an terminal of the load to be tested where the voltage sampling point is formed when a received voltage at the voltage sampling point is equal to zero.

3. The load state detection circuit according to claim 1 , wherein the microcontroller is further configured to, before conductively connecting the load to be tested with the drive power supply, disconnect the load to be tested from the detecting power supply by controlling the switch unit, and determine that the load to be tested and the drive power supply are short-circuited when a received voltage at the voltage sampling point is a voltage of the drive power supply.

4. The load state detection circuit according to claim 1 , wherein the first voltage divider circuit comprises a first resistor network and a second resistor network;

wherein the switch unit is connected to one terminal of the first resistor network, and another terminal of the first resistor network is connected to an terminal of the second resistor network; and

wherein the one terminal of the first resistor network serves as the first terminal of the first voltage divider circuit, a junction of the first resistor network and the second resistor network serves as the second terminal of the first voltage divider circuit, and the other terminal of the second resistor network severs as the third terminal of the first voltage divider circuit;

wherein the first preset range is set according to a resistance of the first voltage divider circuit, an internal resistance of the load to be tested, and a voltage of the detecting power supply comprises:

the first preset range is set according to a resistance of the first resistor network, a resistance of the second resistor network, the internal resistance of the load to be tested, and the voltage of the detecting power supply.

5. The load state detection circuit according to claim 4 , wherein each of the resistance of the first resistor network and the resistance of the second resistor network is greater than an internal resistance of the load to be tested.

6. The load state detection circuit according to claim 5 , each of the resistance of the first resistor and the resistance of the second resistor is ten times the internal resistance of the load to be tested.

7. The load state detection circuit according to claim 1 , wherein the voltage sampling circuit comprises a filter unit and an analog-to-digital converter;

wherein a first terminal of the analog-to-digital converter is connected to the voltage sampling point via the filter unit, and a second terminal of the analog-to-digital converter is connected to the microcontroller.

8. The load state detection circuit according to claim 1 , further comprising at least one anti-reverse diode, wherein at least one terminal of the load to be tested is connected to the switch unit via one of the at least one anti-reverse diode.

9. The load state detection circuit according to claim 1 , wherein the switch unit is a first switch; a control terminal of the first switch is connected to the microcontroller, one terminal of the first switch is connected to the detecting power supply, another terminal of the first switch is connected to the first terminal of the first voltage divider circuit, and the second terminal of the first voltage divider circuit is connected to an terminal of the load to be tested where the voltage sampling point is formed.

10. The load state detection circuit according to claim 1 , wherein the microcontroller is further configured to, when it is determined that no fault exists occurring to the load to be tested:

disconnect the load to be tested from the detecting power supply by controlling the switch unit; and

control conductive connection between the load to be tested and the drive power supply to drive the load to be tested to work.

11. The load state detection circuit according to claim 2 , wherein the first voltage divider circuit comprises a first resistor network and a second resistor network;

wherein the switch unit is connected to one terminal of the first resistor network, and another terminal of the first resistor network is connected to an terminal of the second resistor network; and

wherein the one terminal of the first resistor network serves as the first terminal of the first voltage divider circuit, a junction of the first resistor network and the second resistor network serves as the second terminal of the first voltage divider circuit, and another terminal of the second resistor network severs as the third terminal of the first voltage divider circuit;

wherein the first preset range is set according to a resistance of the first voltage divider circuit, an internal resistance of the load to be tested, and a voltage of the detecting power supply comprises:

the first preset range is set according to a resistance of the first resistor network, a resistance of the second resistor network, the internal resistance of the load to be tested, and the voltage of the detecting power supply.

12. The load state detection circuit according to claim 3 , wherein the first voltage divider circuit comprises a first resistor network and a second resistor network;

wherein the switch unit is connected to one terminal of the first resistor network, and another terminal of the first resistor network is connected to a terminal of the second resistor network; and

wherein the one terminal of the first resistor network serves as the first terminal of the first voltage divider circuit, a junction of the first resistor network and the second resistor network serves as the second terminal of the first voltage divider circuit, and another terminal of the second resistor network severs as the third terminal of the first voltage divider circuit;

wherein the first preset range is set according to a resistance of the first voltage divider circuit, an internal resistance of the load to be tested, and a voltage of the detecting power supply comprises:

the first preset range is set according to a resistance of the first resistor network, a resistance of the second resistor network, the internal resistance of the load to be tested, and the voltage of the detecting power supply.