Chip-package-antenna integrated structure based on substrate integrated waveguide (SIW) multi-feed network
View Patent ↗A chip-package-antenna integrated structure based on an SIW multi-feed network. A plurality of output terminals of the chip are connected to the SIW multi-feed network through the impedance matching network, to achieve the impedance matching between the chip and the SIW multi-feed network. The output terminal of the SIW multi-feed network is directly connected to the antenna terminals, and two or more input signals experience power combining in the substrate integrated waveguide are combined for power combining. Then the combined millimeter-wave signal is radiated by the antenna, finally realizing the power combining in the chip-package-antenna integrated structure. At the same time, the SIW multi-feed network is composed of a SIW structure, in which a plurality of via holes are arranged spaced apart to form a cavity structure.
1. A chip-package-antenna integrated structure based on substrate integrated waveguide (SIW) multi-feed network, comprising:
a chip;
an impedance matching network;
the SIW multi-feed network; and
an antenna;
wherein the chip is a packaged chip;
a plurality of output terminals of the chip are directly connected to a plurality of input terminals of the impedance matching network;
the impedance matching network is configured to connect the plurality of output terminals of the chip to a plurality of input terminals of the SIW multi-feed network correspondingly, and is further configured for an impedance matching between the chip and the SIW multi-feed network; and
the SIW multi-feed network is configured for power combining, and the SIW multi-feed network comprises an output terminal connected to the antenna.
2. The chip-package-antenna integrated structure of claim 1 , wherein the chip comprises a plurality of on-chip transformers in one-to-one correspondence with transmission channels, and the plurality of on-chip transformers are connected to a pad of the chip.
3. The chip-package-antenna integrated structure of claim 2 , wherein the impedance matching network is connected to the pad through ball grid array (BGA), via hole or wire bonding.
4. The chip-package-antenna integrated structure of claim 1 , wherein the chip is packaged by flip-chip, fan-out, wire bonding, low temperature co-fired ceramic (LTCC) or high density interconnect (HDI).
5. The chip-package-antenna integrated structure of claim 1 , wherein the impedance matching network adopts a grounded coplanar waveguide (GCPW) transmission line.
6. The chip-package-antenna integrated structure of claim 5 , wherein a short-circuited stub is provided in a middle of the GCPW transmission line to eliminate a capacitance effect.
7. The chip-package-antenna integrated structure of claim 1 , wherein the plurality of input terminals and the output terminal of the SIW multi-feed network are both arranged on a cavity composed of two rows of via holes.
8. The chip-package-antenna integrated structure of claim 1 , wherein the antenna is patch antenna, Yagi antenna, dipole antenna, Vivaladi antenna, slot antenna or horn antenna, or an array thereof.
9. The chip-package-antenna integrated structure of claim 1 , wherein the impedance matching network, the SIW multi-feed network and the antenna are all arranged on an upper surface of a dielectric slab, and are respectively connected to a metal ground on a lower surface of the dielectric slab through via holes.