IP Library Granted Patent US 11,494,185
Granted Patent B2
US 11,494,185 · App. 17/207,806 · Granted Nov 8, 2022

Method, device and computer program product for thread management

Inventors: Ming Zhang (Beijing, CN); Huan Chen (Beijing, CN); Shuo Lv (Beijing, CN)
Assignee: EMC IP Holding Company LLC
G06F9/3009G06F9/4486G06F9/524
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,494,185
App. No.
17/207,806
Granted
Nov 8, 2022
Kind
B2
Abstract

Techniques for managing threads involve acquiring respective runtime addresses and call information of a plurality of lock objects in a plurality of threads, and determining, from the plurality of lock objects, a first group of lock objects associated with first call information and a second group of lock objects associated with second call information different from the first call information. The techniques further involve providing an indication that a deadlock exists in the plurality of threads if it is determined that a first group of runtime addresses of the first group of lock objects overlaps with a second group of runtime addresses of the second group of lock objects. Accordingly, potential deadlocks in a plurality of threads can be analyzed, thereby avoiding the inability of the threads to proceed normally due to the deadlocks.

Claims (32)

1. A method for managing threads, comprising:

acquiring respective runtime addresses and call information of a plurality of lock objects in a plurality of threads;

determining, from the plurality of lock objects, a first group of lock objects associated with first call information and a second group of lock objects associated with second call information different from the first call information; and

providing an indication that a deadlock exists in the plurality of threads if it is determined that a first group of runtime addresses of the first group of lock objects overlaps with a second group of runtime addresses of the second group of lock objects.

2. The method according to claim 1 , wherein providing the indication comprises:

sorting the first group of lock objects and the second group of lock objects according to the first group of runtime addresses and the second group of runtime addresses; and

providing the indication if it is determined that a first lock object in the first group of lock objects is ranked lower than a second lock object in the second group of lock objects.

3. The method according to claim 1 , wherein the first group of lock objects corresponds to a first lock in a static code, and the second group of lock objects corresponds to a second lock in the static code and different from the first lock.

4. The method according to claim 3 , wherein a first static address of the first lock in a code segment is located before a second static address of the second lock in the code segment.

5. The method according to claim 3 , wherein the indication comprises a name of the first lock and a name of the second lock.

6. The method according to claim 3 , wherein the first call information comprises a first jump address corresponding to the first lock, and the second call information comprises a second jump address corresponding to the second lock.

7. The method according to claim 6 , further comprising:

disassembling constructor functions of the first lock and the second lock to determine the first jump address and the second jump address.

8. An electronic device, comprising:

at least one processor; and

at least one memory storing computer program instructions, the at least one memory and the computer program instructions being configured to cause, together with the at least one processor, the electronic device to perform actions comprising:

acquiring respective runtime addresses and call information of a plurality of lock objects in a plurality of threads;

determining, from the plurality of lock objects, a first group of lock objects associated with first call information and a second group of lock objects associated with second call information different from the first call information; and

providing an indication that a deadlock exists in the plurality of threads if it is determined that a first group of runtime addresses of the first group of lock objects overlaps with a second group of runtime addresses of the second group of lock objects.

9. The electronic device according to claim 8 , wherein providing the indication comprises:

sorting the first group of lock objects and the second group of lock objects according to the first group of runtime addresses and the second group of runtime addresses; and

providing the indication if it is determined that a first lock object in the first group of lock objects is ranked lower than a second lock object in the second group of lock objects.

10. The electronic device according to claim 8 , wherein the first group of lock objects corresponds to a first lock in a static code, and the second group of lock objects corresponds to a second lock in the static code and different from the first lock.

11. The electronic device according to claim 10 , wherein a first static address of the first lock in a code segment is located before a second static address of the second lock in the code segment.

12. The electronic device according to claim 10 , wherein the indication comprises a name of the first lock and a name of the second lock.

13. The electronic device according to claim 10 , wherein the first call information comprises a first jump address corresponding to the first lock, and the second call information comprises a second jump address corresponding to the second lock.

14. The electronic device according to claim 13 , wherein the actions further comprise:

disassembling constructor functions of the first lock and the second lock to determine the first jump address and the second jump address.

15. A computer program product having a non-transitory computer readable medium which stores a set of instructions to manage threads; the set of instructions, when carried out by computerized circuitry, causing the computerized circuitry to perform a method of:

acquiring respective runtime addresses and call information of a plurality of lock objects in a plurality of threads;

determining, from the plurality of lock objects, a first group of lock objects associated with first call information and a second group of lock objects associated with second call information different from the first call information; and

providing an indication that a deadlock exists in the plurality of threads if it is determined that a first group of runtime addresses of the first group of lock objects overlaps with a second group of runtime addresses of the second group of lock objects.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0280) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0255 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0001) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062021/0844 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0124) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0012 →
RELEASE OF SECURITY INTEREST Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058297/0332 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0124 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0280 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE MISSING PATENTS THAT WERE ON THE ORIGINAL SCHEDULED SUBMITTED BUT NOT ENTERED PREVIOUSLY RECORDED AT REEL: 056250 FRAME: 0541. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 17, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056311/0781 →
SECURITY AGREEMENT Recorded May 14, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056250/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 8, 2021
From: ZHANG, MING; CHEN, HUAN; LV, SHUO
To: EMC IP HOLDING COMPANY LLC
Reel/Frame 055863/0757 →
Priority Claims (1)
CN 202110014400.8 · Jan 6, 2021 · national
Continuity (1)
Related Publication 20220214876A1 · Jul 7, 2022