IP Library Granted Patent US 12,340,113
Granted Patent B2
US 12,340,113 · App. 17/214,819 · Granted Jun 24, 2025

Host controlled garbage collection in a solid state drive

Inventors: Bishwajit Dutta (Hillsboro, OR); Anand S. Ramalingam (Portland, OR); Sanjeev N. Trika (Portland, OR); Pallav H. Gala (Hillsboro, OR)
Assignee: SK hynix NAND Product Solutions Corp.
G06F3/0655G06F3/0604G06F3/0679G06F12/0253G06F2212/7205
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Quick Facts
Patent No.
US 12,340,113
App. No.
17/214,819
Granted
Jun 24, 2025
Kind
B2
Abstract

Read Quality of Service in a solid state drive is improved by allowing a host system communicatively coupled to the solid state drive to control garbage collection in the solid state drive. Through the use of controlled garbage collection, the host system can control when to start and stop garbage collection in the solid state drive and the number of NAND dies engaged in garbage-collection operations.

Claims (41)

1. A solid state drive comprising:

a plurality of non-volatile memory dies comprising a first portion that is used for garbage collection; and

a buffer used to store data to be written to the plurality of non-volatile memory dies, wherein a first portion of the buffer is used to store data to be written during a garbage collection operation to the first portion of the plurality of non-volatile memory dies, and wherein a second portion of the buffer is used to store a host write command; and

a controller configured to at least:

receive from a host system a command to control a number of dies in the first portion of the plurality of non-volatile memory dies to have a given number of dies;

in response to receiving the command, configure the number of dies in the first portion of the plurality of non-volatile memory dies to have the given number of dies;

in response to configuring the number of dies in the first portion of the plurality of non-volatile memory dies, configure a ratio of a size of the first portion of the buffer to a size of the second portion of the buffer to be proportional to a percentage of a total number of dies in the plurality of non-volatile memory dies used for the first portion of the plurality of non-volatile memory dies.

2. The solid state drive of claim 1 , wherein the non-volatile memory dies are NAND dies.

3. The solid state drive of claim 1 , wherein the size of the first portion of the plurality of non-volatile memory dies is dependent on a number of Input/Output operations from the host system.

4. The solid state drive of claim 1 , wherein a maximum write amplification factor for garbage collection is configured by the host system.

5. The solid state drive of claim 1 , wherein the solid state drive is configured to manage a maximum number of block addressable non-volatile memory dies that are used to perform write operations for garbage collection.

6. The solid state drive of claim 1 , wherein the solid state drive is configured to manage a ratio between the size of the first portion of the buffer and a size of the second portion of the buffer.

7. The solid state drive of claim 1 , wherein the solid state drive is configured to adjust a maximum number of block addressable non-volatile memory dies that are used to perform a garbage collection write operation and a ratio between the size of the first portion of the buffer and a size of the second portion of the buffer based on a state of the solid state drive and a measured read Quality of Service.

8. A method comprising:

storing data in a plurality of non-volatile memory dies comprising a first portion that is used for garbage collection; and

storing, in a buffer, data to be written to the plurality of non-volatile memory dies, wherein a first portion of the buffer is used to store data to be written during a garbage collection operation to the first portion of the plurality of non-volatile memory dies, and wherein a second portion of the buffer is used to store a host write command; and

receiving from a host system a command to control a number of dies in the first portion of the plurality of non-volatile memory dies to have a given number of dies;

in response to receiving the command, configuring the number of dies in the first portion of the plurality of non-volatile memory dies to have the given number of dies;

in response to configuring the number of dies in the first portion of the plurality of non-volatile memory dies, configure a ratio of a size of the first portion of the buffer to a size of the second portion of the buffer to be proportional to a percentage of a total number of dies in the plurality of non-volatile memory dies used for the first portion of the plurality of non-volatile memory dies.

9. The method of claim 8 , wherein the non-volatile memory dies are NAND dies.

10. The method of claim 8 , wherein the size of the first portion of the plurality of non-volatile memory dies is dependent on a number of Input/Output operations from the host system.

11. The method of claim 8 , wherein a maximum write amplification factor for garbage collection is configured by the host system.

12. The method of claim 8 , further comprising managing a maximum number of block addressable non-volatile memory dies that are used to perform write operations for garbage collection.

13. The method of claim 8 , further comprising managing a ratio between the size of the first portion of the buffer and a size of the second portion of the buffer.

14. The method of claim 8 , adjusting a maximum number of block addressable non-volatile memory dies that are used to perform a garbage collection write operation and a ratio between the size of the first portion of the buffer and a size of the second portion of the buffer based on a state of the solid state drive and a measured read Quality of Service.

15. A system comprising:

a processor; and

a solid state drive comprising:

a plurality of non-volatile memory dies comprising a first portion that is used for garbage collection; and

a buffer used to store data to be written to the plurality of non-volatile memory dies, wherein a first portion of the buffer is used to store data to be written during a garbage collection operation to the first portion of the plurality of non-volatile memory dies, and wherein a second portion of the buffer is used to store a host write command; and

a controller configured to at least:

receive from the processor a command to control a number of dies in the first portion of the plurality of non-volatile memory dies to have a given number of dies;

in response to receiving the command, configure the number of dies in the first portion of the plurality of non-volatile memory dies to have the given number of dies;

in response to configuring the number of dies in the first portion of the plurality of non-volatile memory dies, configure a ratio of a size of the first portion of the buffer to a size of the second portion of the buffer to be proportional to a percentage of a total number of dies in the plurality of non-volatile memory dies used for the first portion of the plurality of non-volatile memory dies.

16. The system of claim 15 , wherein the size of the first portion of the plurality of non-volatile memory dies is dependent on a number of Input/Output operations from the processor.

17. The system of claim 15 , wherein the processor is configured to configure a maximum write amplification factor for garbage collection.

18. The system of claim 15 , wherein the solid state drive is configured to manage a maximum number of block addressable non-volatile memory dies that are used to perform write operations for garbage collection.

19. The system of claim 15 , wherein the solid state drive is configured to manage a ratio between the size of the first portion of the buffer and a size of the second portion of the buffer.

20. The system of claim 15 , further comprising one or more of:

a display communicatively coupled to the processor; or

a battery coupled to the processor.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 062437/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 30, 2021
From: DUTTA, BISHWAJIT; RAMALINGAM, ANAND S.; TRIKA, SANJEEV N.; GALA, PALLAV H.
To: INTEL CORPORATION
Reel/Frame 055774/0455 →
Continuity (1)
Related Publication 20210216239A1 · Jul 15, 2021
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