Granted Patent B2

US 12,224,871 · App. 17/217,051 · Granted Feb 11, 2025

Inventors: Jian Zhang (Beijing, CN); Pengyu Ji (Beijing, CN); Guorong Li (Beijing, CN); Lei Zhang (Beijing, CN); Xin Wang (Beijing, CN)

Assignee: FUJITSU LIMITED

H04L1/1887H04L1/1819H04L1/1896H04W72/02H04W72/0466H04W92/18

Abstract

Claims (10)

1. An apparatus for transmitting sidelink information, configured in a second device, comprising:

a memory that stores a plurality of instructions; and

processor circuitry coupled to the memory and configured to execute the instructions to:

receive first sidelink data information and/or a reference signal transmitted by at least one first device;

indicate sidelink feedback information for the first sidelink data information and/or reference signal by using an identifier; and

transmit to the at least one first device the indicated sidelink feedback information,

wherein the identifier comprises an identifier of the first device and an identifier of the second device, and wherein the processor circuitry is configured to, according to the identifier of the first device and the identifier of the second device, determine a cyclic shift used by the sidelink feedback information.

2. The apparatus according to claim 1 , wherein the identifier further comprises at least one of the following: a session identifier, a sidelink identifier, a device group identifier.

3. The apparatus according to claim 1 , wherein the processor circuitry is configured to contain at least a part of the identifier in payloads/a payload of the sidelink feedback information.

4. The apparatus according to claim 1 , wherein the processor circuitry is further configured to add cyclic redundancy check into the sidelink feedback information using RM coding or channel coding of a small block length, and/or, add cyclic redundancy check into the sidelink feedback information less than or equal to 2 bits.

Assignments (2)

Continuity (2)

References Cited (52)