IP Library Granted Patent US 11,615,504
Granted Patent B2
US 11,615,504 · App. 17/229,697 · Granted Mar 28, 2023

Methods and apparatus for scalable primitive rate architecture for geometry processing

Inventors: Vishwanath Shashikant Nikam (Bangalore, IN); Kalyan Kumar Bhiravabhatla (Bengaluru, IN); Suvam Chatterjee (Bangalore, IN); Siva Satyanarayana Kola (Bangalore, IN); Abhishek Lal (Bengaluru, IN); Andrew Evan Gruber (Arlington, MA)
Assignee: QUALCOMM Incorporated
G06T1/20G06T1/60G06T15/005
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Quick Facts
Patent No.
US 11,615,504
App. No.
17/229,697
Granted
Mar 28, 2023
Kind
B2
Abstract

The present disclosure relates to methods and devices for graphics processing including an apparatus, e.g., a GPU. The apparatus may receive a plurality of indices for each of a plurality of primitives. The apparatus may also determine a size of each of a plurality of primitive batches, each of the plurality of primitive batches including at least one primitive of the plurality of primitives. Additionally, the apparatus may divide, based on the determined size of each of the plurality of primitive batches, the plurality of primitives into the plurality of primitive batches. The apparatus may also distribute each of the plurality of primitive batches to each of a plurality of geometry slices, each of the plurality of geometry slices including one or more primitives of the plurality of primitives.

Claims (64)

1. A method of graphics processing, comprising:

determining a visibility of each of a plurality of primitives;

receiving a plurality of indices for each of the plurality of primitives, wherein the plurality of indices for each of the plurality of primitives is received based on the visibility of each of the plurality of primitives;

determining a size of each of a plurality of primitive batches, each of the plurality of primitive batches including at least one primitive of the plurality of primitives;

dividing, based on the determined size of each of the plurality of primitive batches, the plurality of primitives into the plurality of primitive batches;

distributing each of the plurality of primitive batches to each of a plurality of geometry slices, each of the plurality of geometry slices including one or more primitives of the plurality of primitives;

processing each of the plurality of geometry slices including the one or more primitives, wherein the plurality of geometry slices is arranged in a slice order, each of the plurality of geometry slices corresponding to a position in the slice order; and

rasterizing each of the plurality of primitives based on the slice order of the plurality of geometry slices.

2. The method of claim 1 , wherein receiving the plurality of indices for each of the plurality of primitives comprises:

fetching the plurality of indices for each of the plurality of primitives.

3. The method of claim 1 , wherein each of the plurality of indices is associated with a primitive restart index.

4. The method of claim 3 , wherein the distribution of each of the plurality of primitive batches to each of the plurality of geometry slices is based on the primitive restart index associated with each of the plurality of indices.

5. The method of claim 1 , wherein processing each of the plurality of geometry slices comprises:

shading each of the plurality of geometry slices including the one or more primitives.

6. The method of claim 1 , wherein each of the plurality of geometry slices is processed by at least one of a vertex shader, a geometry shader, a domain shader, or a tessellator.

7. The method of claim 6 , wherein the tessellator is configured to process a geometry for each of the plurality of geometry slices.

8. The method of claim 6 , wherein the tessellator is a primitive index based tessellator.

9. The method of claim 1 , further comprising:

rearranging the slice order of the plurality of geometry slices, such that at least one of the plurality of geometry slices corresponds to an updated position in the slice order.

10. The method of claim 1 , wherein each of the rasterized plurality of primitives is rendered by a graphics processing unit (GPU).

11. The method of claim 1 , wherein the size of each of the plurality of primitive batches is determined based on at least one of a size of at least one drawcall, a size of at least one work item, or an adjustment to a size of at least one of the plurality of primitives.

12. The method of claim 1 , wherein the size of each of the plurality of primitive batches is based on one or more parameters including at least one of one or more tessellation factors, at least one primitive offset, or a span of one or more consecutive primitives.

13. The method of claim 1 , wherein each of the plurality of primitive batches includes a start indication and an end indication, the start indication corresponding to a start of the primitive batch and the end indication corresponding to an end of the primitive batch.

14. An apparatus for graphics processing, comprising:

a memory; and

at least one processor coupled to the memory and configured to:

determine a visibility of each of a plurality of primitives;

receive a plurality of indices for each of the plurality of primitives, wherein the plurality of indices for each of the plurality of primitives is received based on the visibility of each of the plurality of primitives;

determine a size of each of a plurality of primitive batches, each of the plurality of primitive batches including at least one primitive of the plurality of primitives;

divide, based on the determined size of each of the plurality of primitive batches, the plurality of primitives into the plurality of primitive batches;

distribute each of the plurality of primitive batches to each of a plurality of geometry slices, each of the plurality of geometry slices including one or more primitives of the plurality of primitives;

process each of the plurality of geometry slices including the one or more primitives, wherein the plurality of geometry slices is arranged in a slice order, each of the plurality of geometry slices corresponding to a position in the slice order; and

rasterize each of the plurality of primitives based on the slice order of the plurality of geometry slices.

15. The apparatus of claim 14 , wherein to receive the plurality of indices for each of the plurality of primitives, the at least one processor is configured to:

fetch the plurality of indices for each of the plurality of primitives.

16. The apparatus of claim 14 , wherein each of the plurality of indices is associated with a primitive restart index.

17. The apparatus of claim 16 , wherein the distribution of each of the plurality of primitive batches to each of the plurality of geometry slices is based on the primitive restart index associated with each of the plurality of indices.

18. The apparatus of claim 14 , wherein to process each of the plurality of geometry slices, the at least one processor is configured to:

shade each of the plurality of geometry slices including the one or more primitives.

19. The apparatus of claim 14 , wherein the at least one processor is configured to process each of the plurality of geometry slices with at least one of a vertex shader, a geometry shader, a domain shader, or a tessellator.

20. The apparatus of claim 19 , wherein the tessellator is configured to process a geometry for each of the plurality of geometry slices.

21. The apparatus of claim 19 , wherein the tessellator is a primitive index based tessellator.

22. The apparatus of claim 14 , wherein the at least one processor is further configured to:

rearrange the slice order of the plurality of geometry slices, such that at least one of the plurality of geometry slices corresponds to an updated position in the slice order.

23. The apparatus of claim 14 , wherein each of the rasterized plurality of primitives is rendered by a graphics processing unit (GPU).

24. The apparatus of claim 14 , wherein the at least one processor is configured to determine the size of each of the plurality of primitive batches based on at least one of a size of at least one drawcall, a size of at least one work item, or an adjustment to a size of at least one of the plurality of primitives.

25. The apparatus of claim 14 , wherein the size of each of the plurality of primitive batches is based on one or more parameters including at least one of one or more tessellation factors, at least one primitive offset, or a span of one or more consecutive primitives.

26. The apparatus of claim 14 , wherein each of the plurality of primitive batches includes a start indication and an end indication, the start indication corresponding to a start of the primitive batch and the end indication corresponding to an end of the primitive batch.

27. An apparatus for graphics processing, comprising:

means for determining a visibility of each of a plurality of primitives;

means for receiving a plurality of indices for each of the plurality of primitives, wherein the plurality of indices for each of the plurality of primitives is received based on the visibility of each of the plurality of primitives;

means for determining a size of each of a plurality of primitive batches, each of the plurality of primitive batches including at least one primitive of the plurality of primitives;

means for dividing, based on the determined size of each of the plurality of primitive batches, the plurality of primitives into the plurality of primitive batches;

means for distributing each of the plurality of primitive batches to each of a plurality of geometry slices, each of the plurality of geometry slices including one or more primitives of the plurality of primitives;

means for processing each of the plurality of geometry slices including the one or more primitives, wherein the plurality of geometry slices is arranged in a slice order, each of the plurality of geometry slices corresponding to a position in the slice order; and

means for rasterizing each of the plurality of primitives based on the slice order of the plurality of geometry slices.

28. A non-transitory computer-readable medium storing computer executable code for graphics processing, the code when executed by a processor causes the processor to:

determine a visibility of each of a plurality of primitives;

receive a plurality of indices for each of the plurality of primitives, wherein the plurality of indices for each of the plurality of primitives is received based on the visibility of each of the plurality of primitives;

determine a size of each of a plurality of primitive batches, each of the plurality of primitive batches including at least one primitive of the plurality of primitives;

divide, based on the determined size of each of the plurality of primitive batches, the plurality of primitives into the plurality of primitive batches; and

distribute each of the plurality of primitive batches to each of a plurality of geometry slices, each of the plurality of geometry slices including one or more primitives of the plurality of primitives;

process each of the plurality of geometry slices including the one or more primitives, wherein the plurality of geometry slices is arranged in a slice order, each of the plurality of geometry slices corresponding to a position in the slice order; and

rasterize each of the plurality of primitives based on the slice order of the plurality of geometry slices.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 3, 2021
From: NIKAM, VISHWANATH SHASHIKANT; BHIRAVABHATLA, KALYAN KUMAR; CHATTERJEE, SUVAM; KOLA, SIVA SATYANARAYANA; LAL, ABHISHEK; GRUBER, ANDREW EVAN
To: QUALCOMM INCORPORATED
Reel/Frame 056118/0590 →
Continuity (1)
Related Publication 20220327654A1 · Oct 13, 2022