IP Library Granted Patent US 11,747,979
Granted Patent B2
US 11,747,979 · App. 17/235,144 · Granted Sep 5, 2023

Electronic device, computer system, and control method

Inventors: Tetsuya Sunata (Yokohama, JP); Daisuke Iwai (Yokohama, JP); Kenichiro Yoshii (Bunkyo, JP)
Assignee: Kioxia Corporation
G06F3/0608G06F3/064G06F3/0658G06F3/0679G06F12/0246G06F2212/1044G06F2212/2022
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Quick Facts
Patent No.
US 11,747,979
App. No.
17/235,144
Granted
Sep 5, 2023
Kind
B2
Abstract

According to one embodiment, an electronic device includes a nonvolatile memory that includes blocks and a controller. The controller transmits information to the host. The information indicates a first logical address range corresponding to cold data stored in the nonvolatile memory, and a processing amount for turning a cold block that comprises the cold data into a block to which data is writable. The controller reads the cold data from the nonvolatile memory in accordance with a read command that is received from the host and designates the first logical address range, and transmits the read cold data to the host. The controller writes, to the nonvolatile memory, the cold data that is received with a write command designating the first logical address range from the host.

Claims (40)

1. An electronic device connectable to a host, the electronic device comprising:

a nonvolatile memory that includes blocks; and

a controller electrically connected to the nonvolatile memory, wherein

when the electronic device is connected to the host, the controller is configured to transmit first information to the host,

the first information indicates a first logical address range and second information about a cold block,

the first logical address range corresponds to cold data stored in the nonvolatile memory,

the cold block includes the cold data,

the controller is configured to determine the second information about the cold block based on an amount of valid data in the cold block, and

the second information about the cold block includes a processing amount for turning the cold block into a block to which data is writable.

2. The electronic device of claim 1 , wherein the electronic device is connected to the host based on NVMe standard.

3. The electronic device of claim 1 , wherein the controller is configured to:

transmit, to the host, information that indicates the first logical address range corresponding to a first physical memory area in the nonvolatile memory when the cold data is stored in the first physical memory; and

read the cold data from the nonvolatile memory in accordance with a read command that is received from the host and designates the first logical address range, and transmit the read cold data to the host.

4. The electronic device of claim 1 , wherein the controller is configured to:

transmit, to the host, information that indicates the first logical address range corresponding to a first physical memory area in the nonvolatile memory when the cold data is stored in the first physical memory; and

write, to a second physical memory area in the nonvolatile memory, the cold data that is received with a write command designating the first logical address range from the host.

5. The electronic device of claim 4 , wherein the write command comprises information that indicates that data to be written is cold data.

6. The electronic device of claim 1 , wherein the first logical address range is specified by a starting logical address of the first logical address range, and a number of logical blocks included in the first logical address range.

7. The electronic device of claim 1 , wherein an access frequency to the first logical address range is lower than a threshold.

8. The electronic device of claim 1 , wherein

the cold block is a block erased a number of times smaller than a threshold, or a block of which an erasing sequence number is smaller than a particular number, and

the cold data is valid data in the cold block.

9. The electronic device of claim 1 , wherein when the electronic device is connected to the host, the controller is further configured to:

transmit, to the host, information that indicates a processing amount for turning one or more cold blocks in the nonvolatile memory into one or more blocks to which data is writable, in response to an inquiry received from the host; and

execute a process for turning the one or more cold blocks into one or more blocks to which data is writable in response to a request received from the host.

10. The electronic device of claim 1 , wherein

when the electronic device is connected to the host, the controller is further configured to transmit third information to the host when invalid data amount included in one or more cold blocks in the nonvolatile memory exceeds a threshold, and

the third information indicates that the invalid data amount exceeds the threshold or performing a process for turning the one or more cold blocks into one or more blocks to which data is writable is needed.

11. The electronic device of claim 1 , wherein when the electronic device is connected to the host, the controller is further configured to:

read second data from the nonvolatile memory in accordance with a read command that is received from the host and designates a second logical address range, and transmit the read second data to the host, the second logical address range comprising the first logical address range and one or more logical addresses preceding or following the first logical address range; and

write, to the nonvolatile memory, the second data received with a write command designating the second logical address range from the host.

12. The electronic device of claim 1 , wherein when the electronic device is connected to the host, the controller is further configured to:

transmit, to the host, information that indicates a third logical address range corresponding to third data and a processing amount for turning a block comprising the third data into a block to which data is writable, wherein the third data is stored in the nonvolatile memory and is to be moved for data retention;

read the third data from the nonvolatile memory in accordance with a read command that is received from the host and designates the third logical address range, and transmit the read third data to the host; and

write, to the nonvolatile memory, the third data that is received with a write command designating the third logical address range from the host.

13. The electronic device of claim 1 , wherein when the electronic device is connected to the host, the controller is further configured to:

read the cold data from the nonvolatile memory;

issue, to a second electronic device, a write command for writing the read cold data that designates the first logical address range;

invalidate the cold data stored in the nonvolatile memory when the cold data is written to a second nonvolatile memory in the second electronic device in accordance with the issued write command; and

notify the host that the cold data corresponding to the first logical address range is stored in the second electronic device.

Assignments (1)
CHANGE OF NAME Recorded Jan 11, 2022
From: TOSHIBA MEMORY CORPORATION
To: KIOXIA CORPORATION
Reel/Frame 058725/0932 →
Priority Claims (1)
JP 2018-058610 · Mar 26, 2018 · national
Continuity (3)
Continuation 16780101 · Feb 3, 2020
Continuation 16126084 · Sep 10, 2018
Related Publication 20210240352A1 · Aug 5, 2021