Synchronous to semi-synchronous out-of-band i/o
Handling I/O operations between a storage system and a host includes initiating a direct data transfer for each of the I/O operations that initially excludes other processes from using a CPU of the host, setting a first timer for each of the direct data transfers, converting at least some of the direct transfers to semi-synchronous I/O operations that release the CPU for use by other processes and transfer data directly between the storage system and the host in response to the first timer expiring prior to completion of a corresponding one of the direct data transfers, and setting a second timer that corresponds to an expected completion of the semi-synchronous I/O operation. The direct data transfers may exchange data between the host and cache memory of the storage system. The direct data transfers may be performed using a high speed connection between the storage system and the host.
1. A method of handling I/O operations between a storage system and a host, comprising:
initiating synchronous direct data transfers for the I/O operations, the synchronous direct data transfers initially excluding other processes from using a CPU of the host, the synchronous direct data transfers using a first connection between the host and the storage system;
setting a first timer for each of the direct data transfers;
transferring data of each of the synchronous direct data transfers that is unsent after the first timer expires using semi-synchronous I/O operations that release the CPU for use by other processes and transfer the data directly via the first connection between the storage system and the host;
setting a second timer that corresponds to an expected completion of the semi-synchronous I/O operation; and
transferring data of each of the semi-synchronous I/O operations that is unsent after the second timer expires using asynchronous I/O operations that transfer the data via a second connection between the storage system and the host, the second connection being separate from the first connection.
2. A method, according to claim 1 , wherein the direct data transfers exchange data between the host and cache memory of the storage system.
3. A method, according to claim 1 , wherein a particular one of the direct data transfers is converted to a semi-synchronous I/O operation in response to at least one of: whether the first timer expiring is based on a cache miss or whether a length of time since initiating the particular one of the direct data transfers exceeds a predetermined value.
4. A method, according to claim 1 , wherein the the first connection is a high speed connection between the storage system and the host.
5. A method, according to claim 4 , wherein the high speed connection is coupled to a smart network interface controller provided on a director board in the storage system.
6. A method, according to claim 5 , wherein the smart network interface controller includes a system on a chip having a processor, memory, and non-volatile storage.
7. A method, according to claim 6 , wherein the smart network interface controller is a LimeStoneDX SLIC running a PCI PEX8733 Draco chip from Broadcom Corporation of San Jose, Calif.
8. A computer system, according to claim 1 , wherein the direct data transfers exchange data between the computer system and cache memory of the storage system.
9. A computer system, according to claim 1 , wherein a particular one of the direct data transfers is converted to a semi-synchronous I/O operation in response to at least one of:
whether the first timer expiring is based on a cache miss or whether a length of time since initiating the particular one of the direct data transfers exceeds a predetermined value.
10. A method, according to claim 1 , wherein the second connection is a Fibre Channel connection.
11. A non-transitory computer readable medium containing software that handles I/O operations between a storage system and a host, the software comprising:
executable code that initiates synchronous direct data transfers for the I/O operations, the synchronous direct data transfers initially excluding other processes from using a CPU of the host, the synchronous direct data transfers using a first connection between the host and the storage system;
executable code that sets a first timer for each of the synchronous direct data transfers;
executable code that transfers data of each of the synchronous direct data transfers that is unsent after the first timer expires using semi-synchronous I/O operations that release the CPU for use by other processes and transfer the data directly via the first connection between the storage system and the host;
executable code that sets a second timer that corresponds to an expected completion of the semi-synchronous I/O operation; and
executable code that transfers data of each of the semi-synchronous I/O operations that is unsent after the second timer expires using asynchronous I/O operations that transfer the data via a second connection between the storage system and the host, the second connection being separate from the first connection.
12. A non-transitory computer readable medium, according to claim 11 , wherein the direct data transfers exchange data between the host and cache memory of the storage system.
13. A non-transitory computer readable medium, according to claim 11 , wherein a particular one of the direct data transfers is converted to a semi-synchronous I/O operation in response to at least one of: whether the first timer expiring is based on a cache miss or whether a length of time since initiating the particular one of the direct data transfers exceeds a predetermined value.
14. A non-transitory computer readable medium, according to claim 11 , wherein the the first connection is a high speed connection between the storage system and the host.
15. A non-transitory computer readable medium, according to claim 14 , wherein the high speed connection is coupled to a smart network interface controller provided on a director board in the storage system.
16. A non-transitory computer readable medium, according to claim 15 , wherein the smart network interface controller includes a system on a chip having a processor, memory, and non-volatile storage.
17. A non-transitory computer readable medium, according to claim 16 , wherein the smart network interface controller is a LimeStoneDX SLIC running a PCI PEX8733 Draco chip from Broadcom Corporation of San Jose, Calif.
18. A non-transitory computer readable medium, according to claim 11 , wherein the second connection is a Fibre Channel connection.
19. A computer system, comprising:
a processor;
a controller, coupled to the processor, that communicates with a storage system coupled to the computer system; and
a non-transitory computer readable medium coupled to the processor and to the controller and containing software that handles I/O operations between a storage system and the computer system, the software including executable code that initiates synchronous direct data transfers for the I/O operations, the synchronous direct data transfers initially excluding other processes from using the processor, the synchronous direct data transfers using a first connection between the computer system and the storage system, executable code that sets a first timer for each of the synchronous direct data transfers, executable code that transfers data of each of the synchronous direct data transfers that is unsent after the first timer expires using semi-synchronous I/O operations that release the CPU for use by other processes and transfer the data directly via the first connection between the storage system and the computer system, executable code that sets a second timer that corresponds to an expected completion of the semi-synchronous I/O operation, and executable code that transfers data of each of the semi-synchronous I/O operations that is unsent after the second timer expires using asynchronous I/O operations that transfer the data via a second connection between the storage system and the controller of the computer system, the second connection being separate from the first connection.
20. A computer system, according to claim 19 , wherein the first connection is a high speed connection between the storage system and the computer system.
21. A computer system, according to claim 20 , wherein the high speed connection is coupled to a smart network interface controller provided on a director board in the storage system.
22. A computer system, according to claim 21 , wherein the smart network interface controller includes a system on a chip having a processor, memory, and non-volatile storage.
23. A computer system, according to claim 22 , wherein the smart network interface controller is a LimeStoneDX SLIC running a PCI PEX8733 Draco chip from Broadcom Corporation of San Jose, Calif.
24. A computer system, according to claim 19 , wherein the second connection is a Fibre Channel connection.