GLOBAL SHUTTER IMAGE SENSOR

1 . A method comprising:

within an integration period:

enabling a photodiode of a pixel cell to accumulate charge responsive to incident light, and

transferring the charge from the photodiode to a charge storage device of the pixel cell;

performing, using a sampling capacitor, a sample-and-hold operation to convert the charge stored in the charge storage device into a voltage; and

generating a digital output based on the voltage to represent an intensity of the incident light received by the photodiode.

2 . The method of claim 1 , wherein the sampling-and-hold operation comprises:

enabling a sampling switch to cause the sampling capacitor to sample the charge stored in the charge storage device to develop the voltage; and

disabling the sampling switch to cause the sampling capacitor to hold the voltage.

3 . The method of claim 2 , wherein the enabling of the sampling switch starts at a first time within the integration period and ends at a second time after the integration period ends.

4 . The method of claim 3 , wherein the transferring of the charge from the photodiode to the charge storage device starts after the first time and ends before the second time.

5 . The method of claim 1 , wherein:

the pixel cell further includes a shutter switch coupled with the photodiode;

the integration period is started based on disabling the shutter switch; and

the integration period is ended based on enabling the shutter switch.

6 . The method of claim 1 , wherein the pixel cell further includes:

a transfer switch coupled between the photodiode and the charge storage device; and

a reset switch coupled with the charge storage device;

wherein the integration period is started based on disabling the reset switch and the transfer switch; and

wherein the integration period is ended based on enabling the reset switch and the transfer switch.

7 . The method of claim 6 , wherein generating the digital output based on the voltage comprises:

generating, using a comparator, a decision based on the voltage and a threshold;

controlling a memory to store a count value from a counter based on the decision; and

providing the count value as the digital output.

8 . The method of claim 7 , wherein the threshold increases or decreases with time; and

wherein the count value measures a time when the threshold intersects with the voltage.

9 . The method of claim 7 , further comprising: resetting the comparator prior to transferring the charge.

10 . The method of claim 9 , wherein the charge storage device is coupled with the comparator via an AC capacitor;

wherein the voltage is a first voltage;

wherein the method further comprises:

obtaining, using the AC capacitor, a first sample of a reset voltage of the charge storage device caused by a prior reset operation of the charge storage device;

obtaining, using the AC capacitor, a second sample of an offset of the comparator when the comparator is in the reset state;

storing a second voltage across the AC capacitor based on the first sample of the reset voltage and the second sample of the offset; and

outputting, based on the first voltage and the second voltage, a third voltage to the comparator; and

wherein the digital output is generated based on the third voltage.

11 . The method of claim 7 , wherein an output of the comparator is coupled with the memory via a selection switch; and

wherein the method further comprises:

enabling the selection switch to transmit the decision to the memory when the pixel cell is selected to store the digital output in the memory; and

disabling the selection switch to block the decision from the memory when the pixel cell is not selected to store the digital output in the memory.

12 . The method of claim 7 , wherein the comparator is coupled with a power supply via a power switch; and

wherein the method further comprises:

enabling the power switch to enable the comparator to generate the decision when the pixel cell is selected to store the digital output in the memory; and

disabling the power switch to disable the comparator when the pixel cell is not selected to store the digital output in the memory.

13 . The method of claim 7 , wherein the comparator is part of the pixel cell.

14 . The method of claim 1 , wherein the charge storage device comprises at least one of: a floating drain node, or a pinned storage node.

15 . A method comprising:

within an integration period:

enabling a first photodiode to accumulate a first charge responsive to incident light;

transferring the first charge from the first photodiode to a first charge storage device;

enabling a second photodiode to accumulate a second charge responsive to the incident light; and

transferring the second charge from the second photodiode to a second charge storage device;

performing, using a first sampling capacitor, a first sample-and-hold operation to convert the first charge stored in the first charge storage device into a first voltage;

performing, using a second sampling capacitor, a second sample-and-hold operation to convert the second charge stored in the second charge storage device into a second voltage;

generating a first digital output based on the first voltage to represent an intensity of the incident light received by the first photodiode;

storing the first digital output at a memory;

reading the first digital output from the memory;

generating a second digital output based on the second voltage to represent an intensity of the incident light received by the second photodiode; and

after the first digital output is read from the memory, storing the second digital output at the memory.

16 . The method of claim 15 , further comprising:

within the integration period:

enabling a third photodiode to accumulate a third charge responsive to incident light; and

transferring the third charge from the third photodiode to a third charge storage device;

performing, using a third sampling capacitor, a third sample-and-hold operation to convert the third charge stored in the third charge storage device into a third voltage;

generating a third digital output based on the third voltage to represent an intensity of the incident light received by the third photodiode; and

storing the first digital output and the third digital output at the memory prior to reading of the first digital output from the memory.

17 . The method of claim 16 , wherein the first photodiode is part of a first pixel cell;

wherein the second photodiode is part of a second pixel cell; and

wherein the third photodiode is part of a third pixel cell.

18 . The method of claim 16 , wherein the first pixel cell and the third pixel cell are in a first row of pixel cells of an image sensor; and

wherein the second pixel cell is in a second row of the pixel cells of the image sensor.

19 . The method of claim 16 , wherein each of the first, second, and third digital outputs is generated using, respectively, a first comparator, a second comparator, and a third comparator; and

wherein the first, second, and third comparators are reset during, respectively, the first, second, and third sample-and-hold operations.

20 . The method of claim 19 , wherein:

the first comparator is part of the first pixel cell;

the second comparator is part of the second pixel cell; and

the third comparator is part of the third pixel cell.