System and method for boosting up performance of NVMe-TCP transport
A method, computer program product, and computer system for using, by a computing device, free central processing unit (CPU) cycles for processing Non-Volatile Memory express Over Fiber (NVMeoF)/Transmission Control Protocol (TCP) sockets. Using the free CPU cycles for processing the NVMeoF/TCP sockets may include exposing a character device with a callback that iterates over the NVMeoF/TCP sockets for processing.
1. A computer-implemented method comprising:
using, by a computing device, free central processing unit (CPU) cycles for processing Non-Volatile Memory express Over Fiber (NVMeoF)/Transmission Control Protocol (TCP) sockets;
wherein using the free CPU cycles for processing the NVMeoF/TCP sockets includes exposing a character device with a callback that iterates over the NVMeoF/TCP sockets for processing, wherein the callback includes an Input Output Control (IOCTL) callback; and
adding the NVMeoF/TCP sockets to a waiting list, wherein each of the NVMeoF/TCP sockets holds an atomic state and each of the NVMeoF/TCP sockets is configured to be processed by a storage management application thread or a kernel thread (kthread), and wherein a software interrupt adds the NVMeoF/TCP sockets to the waiting list to process the NVMeoF/TCP sockets upon the IOCTL callback being called by the storage management application thread.
2. The computer-implemented method of claim 1 wherein the software interrupt is processed by a frontend CPU core.
3. The computer-implemented method of claim 1 wherein the kthread is woken up by a software interrupt based upon, at least in part, adding the NVMeoF/TCP sockets to the waiting list.
4. A computer program product residing on a non-transitory computer readable storage medium having a plurality of instructions stored thereon which, when executed across one or more processors, causes at least a portion of the one or more processors to perform operations comprising:
using free central processing unit (CPU) cycles for processing Non-Volatile Memory express Over Fiber (NVMeoF)/Transmission Control Protocol (TCP) sockets;
wherein using the free CPU cycles for processing the NVMeoF/TCP sockets includes exposing a character device with a callback that iterates over the NVMeoF/TCP sockets for processing, wherein the callback includes an Input Output Control (IOCTL) callback; and
adding the NVMeoF/TCP sockets to a waiting list, wherein each of the NVMeoF/TCP sockets holds an atomic state and each of the NVMeoF/TCP sockets is configured to be processed by a storage management application thread or a kernel thread (kthread), and wherein a software interrupt adds the NVMeoF/TCP sockets to the waiting list to process the NVMeoF/TCP sockets upon the IOCTL callback being called by the storage management application thread.
5. The computer program product of claim 4 wherein the software interrupt is processed by a frontend CPU core.
6. The computer program product of claim 4 wherein the kthread is woken up by a software interrupt based upon, at least in part, adding the NVMeoF/TCP sockets to the waiting list.
7. A computing system including one or more processors and one or more memories configured to perform operations comprising:
using free central processing unit (CPU) cycles for processing Non-Volatile Memory express Over Fiber (NVMeoF)/Transmission Control Protocol (TCP) sockets;
wherein using the free CPU cycles for processing the NVMeoF/TCP sockets includes exposing a character device with a callback that iterates over the NVMeoF/TCP sockets for processing, wherein the callback includes an Input Output Control (IOCTL) callback; and
adding the NVMeoF/TCP sockets to a waiting list, wherein a software interrupt adds the NVMeoF/TCP sockets to the waiting list to process the NVMeoF/TCP sockets upon the IOCTL callback being called by a storage application thread.
8. The computing system of claim 7 wherein the software interrupt is processed by a frontend CPU core.
9. The computing system of claim 7 wherein a kernel thread (kthread) is woken up by the software interrupt based upon, at least in part, adding the NVMeoF/TCP sockets to the waiting list.
10. The computing system of claim 9 wherein each of the NVMeoF/TCP sockets holds an atomic state.