Display substrate, display panel, and display device

1. A display substrate comprising a display area and a frame area surrounding at least part of the display area, wherein

the display area comprises a first display area and a second display area, and a light transmittance of the first display area is greater than a light transmittance of the second display area;

the display area is provided with a plurality of pixel groups comprising a plurality of sub-pixels arranged along a first direction, and the plurality of sub-pixels comprise one or more first sub-pixels and one or more second sub-pixels;

at least one of the plurality of pixel groups comprises a first sub-pixel group disposed in the first display area and a second sub-pixel group disposed in the second display area, and at least another of the plurality of pixel groups only comprises a second sub-pixel group disposed in the second display area;

the first sub-pixel group comprises at least one first sub-pixel; the second sub-pixel group comprises at least one second sub-pixel; when multiple sub-pixels are provided in a same pixel group, the multiple sub-pixels are arranged at intervals along a second direction;

the display area is provided with pixel circuits for driving the sub-pixels; the frame area is provided with one or more emission (EM) signal control circuits, and a number of output terminals of each EM signal control circuit is m, wherein m is an integer greater than 2; and each of the output terminals is electrically connected to at least part of the pixel circuits of the first sub-pixel group and/or the second sub-pixel group.

2. The display substrate according to claim 1 , wherein the first sub-pixel group comprises two first sub-pixels, and each of the first sub-pixels is provided with a pixel circuit;

the frame area comprises two sub-frame areas located on two opposite sides of the display area; the two sub-frame areas extend in a third direction; each of the two sub-frame areas is provided with an EM signal control circuit corresponding to the first sub-pixel groups; and the pixel circuit of each first sub-pixel in each of the first sub-pixel groups is electrically connected to the EM signal control circuit in one of the two sub-frame areas, wherein the one of the two sub-frame areas is proximate to the each first sub-pixel.

3. The display substrate according to claim 2 , wherein among the first sub-pixels and the second sub-pixels in a same pixel group, one pixel circuit of one second sub-pixel arranged between one first sub-pixel and one sub-frame area proximate to the first sub-pixel, and another pixel circuit of the one first sub-pixel are electrically connected to a same output terminal of a same EM signal control circuit.

4. The display substrate according to claim 1 , wherein each of two sub-frame areas is provided with a scanning control circuit, and the pixel circuit of each first sub pixel in the first sub-pixel group is electrically connected to the scanning control circuit in one sub-frame area proximate to the corresponding first sub-pixel; and

among the first sub-pixels and the second sub-pixels in a same pixel group, one pixel circuit of one second sub-pixel arranged between one first sub-pixel and one sub-frame area proximate to the first sub-pixel, and another pixel circuit of the one first sub-pixel are electrically connected to a same scanning control circuit.

5. The display substrate according to claim 1 , wherein the first sub-pixel group comprises one first sub-pixel, and the first sub-pixel is provided with one pixel circuit;

the frame area comprises two sub-frame areas located on two opposite sides of the display area, the two sub-frame areas extend in a third direction, and one of the two sub-frame areas is provided with one EM signal control circuit corresponding to the first sub-pixel group; and

the pixel circuit of the first sub-pixel in the first sub-pixel group is electrically connected to an output terminal of the corresponding EM signal control circuit.

6. The display substrate according to claim 5 , wherein the pixel circuit of the first sub-pixel and the pixel circuit of the second sub-pixel are connected to a same output terminal of a same EM signal control circuit, wherein, the first sub-pixel and the second sub-pixel are in a same pixel group.

7. The display substrate according to claim 1 , wherein the first sub-pixel group comprises one first sub-pixel, and the first sub-pixel is provided with two pixel circuits;

the frame area comprises two sub-frame areas located on two sides opposite to each other of the display area; the two sub-frame areas extend in a third direction; each of the two sub-frame areas is provided with an EM signal control circuit corresponding to the first sub-pixel group; the two pixel circuits of the first sub-pixel in the first sub-pixel group are electrically connected to two EM signal control circuits one-to-one; and

in a same pixel group, the pixel circuit of the second sub-pixel between the first display area and any one sub-frame area, and the pixel circuit of the first sub-pixel proximate to the one sub-frame area, are connected to a same output terminal of the EM signal control circuit in the one sub-frame area.

8. The display substrate according to claim 1 , wherein the second display area comprises a first area and a second area; the second area is adjacent to the first area and the first display area; the second area surrounds at least part of the first display area; and the pixel circuit of the first sub-pixel in the first sub-pixel group is disposed in the second area.

9. The display substrate according to claim 8 , wherein the first sub-pixel group comprises two first sub-pixels; and each of the two first sub-pixels is provided with one pixel circuit, and the pixel circuit of each first sub-pixel is disposed in a region of the second area, which is proximate to the each first sub-pixel.

10. The display substrate according to claim 8 , wherein the first sub-pixel group comprises one first sub-pixel, and the first sub-pixel is provided with one pixel circuit; and the pixel circuit of the first sub-pixel in the first sub-pixel group is disposed in a region of the second area, which is located on either side of the first sub-pixel.

11. The display substrate according to claim 8 , wherein the first sub-pixel group comprises one first sub-pixel, the first sub-pixel is provided with two pixel circuits, and the two pixel circuits of the first sub-pixel are respectively disposed in two regions of the second area, which are located on two sides of the first sub-pixel; and

a distribution density of the second sub-pixels in the second area is greater than a distribution density of the first sub-pixels in the first display area, and less than a distribution density of the second sub-pixels in the first area.

12. The display substrate according to claim 1 , wherein a distribution density of the first sub-pixels in the first display area is less than a distribution density of the second sub-pixels in the second display area; and

in a same pixel group, a first directional dimension of the first sub-pixel is greater than a first directional dimension of the second sub-pixel; the second display area further comprises at least one third sub-pixel group disposed between two adjacent second sub-pixel groups; the third sub-pixel group comprises at least one second sub-pixel, and when the third sub-pixel group comprises a plurality of the second sub-pixels, the plurality of the second sub-pixels are arranged at intervals and spaced by the first sub-pixel group along the second direction.

13. The display substrate according to claim 12 , wherein the frame area comprises two sub-frame areas located on two opposite sides of the display area; two sub-frame areas extend in a third direction; and among the second sub-pixels in the third sub-pixel group and the second sub-pixels in one second sub-pixel group adjacent to the third sub-pixel group, pixel circuits of second sub-pixels in the one second sub-pixel group, which are arranged between one of the two sub-frame areas and the first display area, and pixel circuits of second sub-pixels in the third sub-pixel group, which are arranged between the one of the two sub-frame areas and the first display area, are electrically connected to a same output terminal of a same EM signal control circuit, or connected to different output terminals of the same EM signal control circuit.

14. The display substrate according to claim 1 , wherein the first sub-pixel comprises a first electrode, a first light-emitting structure block disposed on the first electrode, and a second electrode disposed on the first light-emitting structure block;

the first electrode of each first sub-pixel comprises two or more first electrode blocks and a connecting portion disposed between two adjacent first electrode blocks, and the two adjacent first electrode blocks are electrically connected through the connecting portion; among the first electrode blocks of the first sub-pixels in a same first sub-pixel group, two adjacent first electrode blocks are staggered in the second direction; and the second direction is perpendicular to the first direction.

15. The display substrate according to claim 14 , wherein the display substrate comprises a substrate, and the first electrode block is disposed on the substrate; a projection of the first electrode block on the substrate consists of one or more first graphic units; the first graphic unit is a circle, an ellipse, dumbbell-shaped, gourd-shaped or a rectangle;

a projection of the first light-emitting structural block on the substrate comprises one or more second graphic units, which are identical to or different from the first graphic unit;

the first electrode and the second electrode are transparent materials; and a light transmittance of the transparent material is greater than or equal to 70%.

16. The display substrate according to claim 1 , wherein the frame area is further provided with a low-level power signal line; each first sub-pixel in the first sub-pixel group comprises a first electrode, a first light-emitting structural block disposed on the first electrode, and a second electrode disposed on the first light-emitting structural block;

the second sub-pixel in the second sub-pixel group comprises a third electrode, a second light-emitting structural block disposed on the third electrode, and a fourth electrode disposed on the second light-emitting structural block; the second electrode in the first display area and the fourth electrode in the second display area are connected to form a planar electrode; and

the first display area adjoins the frame area; the low-level power signal line surrounds at least part of the display area; the low-level power signal line and the planar electrode are bridged by a conductive layer; a material of a partial conductive layer adjacent to the first display area is a transparent conductive material, or an area of the frame area adjacent to the first display area is not provided with the low-level power signal line.

17. The display substrate according to claim 1 , wherein a distribution density of the first sub-pixels in the first display area is less than a distribution density of the second sub-pixels in the second display area;

a number of colors of the first sub-pixels in the first display area is n, and a number of colors of the second sub-pixels in the second display area is n, wherein n is a natural number not less than 3;

wherein the first sub-pixel of a first color group in the first display area, which is adjacent to the second display area, and the second sub-pixel of a second color group in the second display area, which is adjacent to the first sub-pixel with the first color group, constitute a transition pixel unit; and

a number of colors in the first color group is m1, wherein m1∈[1,n−1], and a number of colors in the second color group is m2, wherein m2=n−m1; color types of the first color group are different from color types of the second color group.

18. The display substrate according to claim 17 , wherein the first sub-pixel in the transition pixel unit, and the first sub-pixel in the first display area, which has a same color as in the second color group and is proximate to the first sub-pixel in the transition pixel unit, constitute one or more first pixel units;

wherein during a display, the first sub-pixel in the transition pixel unit is a multiplexing sub-pixel used by the transition pixel unit and the first pixel unit in the first display area; or,

the first sub-pixel in the transition pixel unit is an isolated sub-pixel in the first display area; and the isolated sub-pixel and other first sub-pixels in the first display area cannot form a complete first pixel unit.

19. A display panel, comprising:

a package structure; and

a display substrate, the display substrate comprising a display area and a frame area surrounding at least part of the display area,

wherein

the display area comprises a first display area and a second display area, and a light transmittance of the first display area is greater than a light transmittance of the second display area;

the display area is provided with a plurality of pixel groups comprising a plurality of sub-pixels arranged along a first direction, and the plurality of sub-pixels comprise one or more first sub-pixels and one or more second sub-pixels;

at least one of the plurality of pixel groups comprises a first sub-pixel group disposed in the first display area and a second sub-pixel group disposed in the second display area, and at least another of the plurality of pixel groups only comprises a second sub-pixel group disposed in the second display area;

the first sub-pixel group comprises at least one first sub-pixel; the second sub-pixel group comprises at least one second sub-pixel; when multiple sub-pixels are provided in a same pixel group, the multiple sub-pixels are arranged at intervals along a second direction;

the display area is provided with pixel circuits for driving the sub-pixels; the frame area is provided with one or more emission (EM) signal control circuits, and a number of output terminals of each EM signal control circuit is m, wherein m is an integer greater than 2; and each of the output terminals is electrically connected to at least part of the pixel circuits of the first sub-pixel group and/or the second sub-pixel group;

wherein the package structure comprises a polarizer, which covers at least the second display area, and the polarizer does not cover the first display area.

20. A display device, comprising: a device body having a component area; and

a display panel, the display panel covering the device body, the display panel comprising a package structure and a display substrate, the display substrate comprising a display area and a frame area surrounding at least part of the display area;

wherein

the display area comprises a first display area and a second display area, and a light transmittance of the first display area is greater than a light transmittance of the second display area;

the display area is provided with a plurality of pixel groups comprising a plurality of sub-pixels arranged along a first direction, and the plurality of sub-pixels comprise one or more first sub-pixels and one or more second sub-pixels;

at least one of the plurality of pixel groups comprises a first sub-pixel group disposed in the first display area and a second sub-pixel group disposed in the second display area, and at least another of the plurality of pixel groups only comprises a second sub-pixel group disposed in the second display area;

the first sub-pixel group comprises at least one first sub-pixel; the second sub-pixel group comprises at least one second sub-pixel; when multiple sub-pixels are provided in a same pixel group, the multiple sub-pixels are arranged at intervals along a second direction;

the display area is provided with pixel circuits for driving the sub-pixels; the frame area is provided with one or more emission (EM) signal control circuits, and a number of output terminals of each EM signal control circuit is m, wherein m is an integer greater than 2; and each of the output terminals is electrically connected to at least part of the pixel circuits of the first sub-pixel group and/or the second sub-pixel group;

the package structure comprises a polarizer, which covers at least the second display area, and the polarizer does not cover the first display area;

wherein the component area is disposed under the first display area, and the component area is provided with a photosensitive device that emits or collects light passing through the first display area.