IP Library Granted Patent US 11,675,719
Granted Patent B2
US 11,675,719 · App. 17/240,240 · Granted Jun 13, 2023

System and method for multi-node communication

Inventors: Aric Hadav (Tel-Aviv, IL); Xiang Yu (Shanghai, CN); Sandburg Hu (Shanghai, CN); Kunzheng Zhang (Shanghai, CN)
Assignee: EMC IP Holding Company, LLC
G06F13/28G06F2213/28
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,675,719
App. No.
17/240,240
Granted
Jun 13, 2023
Kind
B2
Abstract

A method, computer program product, and computing system for coupling a multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs). One or more signals may be routed, via the multi-host RDMA card, between the at least a pair of CPUs.

Claims (40)

1. A computer-implemented method, executed on a computing device, comprising:

coupling a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs);

representing to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and

routing, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

2. The computer-implemented method of claim 1 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:

coupling each CPU of the at least a pair of CPUs to a midplane; and

coupling the single multi-host RDMA card to the midplane.

3. The computer-implemented method of claim 2 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

4. The computer-implemented method of claim 1 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

5. The computer-implemented method of claim 4 , further comprising:

coupling a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and

routing, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

6. The computer-implemented method of claim 1 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

7. The computer-implemented method of claim 1 , wherein routing the one or more signals between the at least a pair of CPUs includes mirroring data between the at least a pair of CPUs.

8. A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:

coupling a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs);

representing to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and

routing, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

9. The computer program product of claim 8 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:

coupling each CPU of the at least a pair of CPUs to a midplane; and

coupling the single multi-host RDMA card to the midplane.

10. The computer program product of claim 9 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

11. The computer program product of claim 8 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

12. The computer program product of claim 11 , the operations further comprising:

coupling a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and

routing, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

13. The computer program product of claim 8 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

14. The computer program product of claim 8 , wherein routing the one or more signals between the at least a pair of CPUs includes mirroring data between the at least a pair of CPUs.

15. A computing system comprising:

a memory; and

a processor configured to couple a single multi-host remote direct memory access (RDMA) card to at least a pair of central processing units (CPUs), wherein the processor is further configured to represent to each CPU, via the single multi-host RDMA card, every other CPU of the at least a pair of CPUs as an endpoint; and wherein the processor is further configured to route, via the single multi-host RDMA card, one or more signals between the at least a pair of CPUs.

16. The computing system of claim 15 , wherein coupling the single multi-host RDMA card to the at least a pair of CPUs includes:

coupling each CPU of the at least a pair of CPUs to a midplane; and

coupling the single multi-host RDMA card to the midplane.

17. The computing system of claim 15 , wherein the midplane is configured to be positioned on a storage drive-side of an information technology (IT) rack.

18. The computing system of claim 15 , wherein a first CPU of the at least a pair of CPUs is positioned within a first storage processor and a second CPU of the at least a pair of CPUs is positioned within a second storage processor.

19. The computing system of claim 18 , wherein the processor is further configured to:

couple a second multi-host RDMA card to a third CPU positioned within the first storage processor and a fourth CPU positioned within the second storage processor; and

route, via the second multi-host RDMA card, one or more signals between the third CPU and the fourth CPU.

20. The computing system of claim 15 , wherein the single multi-host RDMA card is configured to provide Ethernet over PCIe connectivity between the at least a pair of CPUs.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0280) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0255 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0124) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0012 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (056295/0001) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062021/0844 →
RELEASE OF SECURITY INTEREST Recorded Nov 2, 2021
From: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 058297/0332 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0124 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0001 →
SECURITY INTEREST Recorded May 19, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 056295/0280 →
CORRECTIVE ASSIGNMENT TO CORRECT THE MISSING PATENTS THAT WERE ON THE ORIGINAL SCHEDULED SUBMITTED BUT NOT ENTERED PREVIOUSLY RECORDED AT REEL: 056250 FRAME: 0541. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT. Recorded May 17, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056311/0781 →
SECURITY AGREEMENT Recorded May 14, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 056250/0541 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2021
From: HADAV, ARIC; YU, XIANG; HU, SANDBURG; ZHANG, KUNZHENG
To: EMC IP HOLDING COMPANY, LLC
Reel/Frame 056040/0479 →