IP Library Granted Patent US 12,131,064
Granted Patent B2
US 12,131,064 · App. 17/241,976 · Granted Oct 29, 2024

Dynamic program suspend disable for random write SSD workload

Inventors: Vivek Angoth (Longmont, CO); David Carlton (Oakland, CA); Sarvesh Gangadhar (Santa Clara, CA); MarkAnthony Golez (Folsom, CA); David J. Pelster (Longmont, CO); Neelesh Vemula (Sunnyvale, CA)
Assignee: SK hynix NAND Product Solutions Corp.
G06F3/0659G06F3/0605G06F3/0614G06F3/0653G06F3/0679
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Quick Facts
Patent No.
US 12,131,064
App. No.
17/241,976
Granted
Oct 29, 2024
Kind
B2
Abstract

An embodiment of an electronic apparatus may include one or more substrates, and a controller coupled to the one or more substrates, the controller including circuitry to control access to NAND-based storage media that includes a plurality of NAND devices, determine if a current workload for a particular NAND device of the plurality of NAND devices is a random write workload, and, if so determined, disable a program suspend operation for only the particular NAND device. Other embodiments are disclosed and claimed.

Claims (55)

1. An electronic apparatus, comprising:

one or more substrates; and

a controller coupled to the one or more substrates, the controller including circuitry to:

control access to NAND-based storage media that includes a plurality of NAND devices,

determine if a current workload for a particular NAND device of the plurality of NAND devices is a random write workload, and, if so determined,

disable a program suspend operation for only the particular NAND device.

2. The apparatus of claim 1 , wherein the circuitry is further to:

determine if a host read is pending for the particular NAND device; and, if so determined, enable the program suspend operation for only the particular NAND device.

3. The apparatus of claim 2 , wherein the circuitry is further to:

maintain a command queue for each of the plurality of NAND devices; and

maintain a counter value associated with each of the command queues to count respective host reads for each of the command queues.

4. The apparatus of claim 3 , wherein the circuitry is further to:

increment the counter value associated with the command queue for the particular NAND device when a command from a host read is placed in the command queue for the particular NAND device; and

decrement the counter value associated with the command queue for the particular NAND device when the command from the host read is removed from the command queue for the particular NAND device.

5. The apparatus of claim 4 , wherein the circuitry is further to:

determine that the current workload for the particular NAND device of the plurality of NAND devices is the random write workload if the counter value associated with the command queue for the particular NAND device is zero.

6. The apparatus of claim 4 , wherein the circuitry is further to:

determine that the host read is pending for the particular NAND device if the counter value associated with the command queue for the particular NAND device is non-zero.

7. The apparatus of claim 1 , wherein the controller and the NAND-based storage media are incorporated in a solid-state drive.

8. An electronic storage system, comprising:

NAND-based storage media that includes a plurality of NAND devices; and

a controller communicatively coupled to the NAND-based storage media, the controller including circuitry to:

determine if a current workload for a particular NAND device of the plurality of NAND devices is a random write workload, and, if so determined,

disable a program suspend operation for only the particular NAND device.

9. The system of claim 8 , wherein the circuitry is further to:

determine if a host read is pending for the particular NAND device; and, if so determined,

enable the program suspend operation for only the particular NAND device.

10. The system of claim 9 , wherein the circuitry is further to:

maintain a command queue for each of the plurality of NAND devices; and

maintain a counter value associated with each of the command queues to count respective host reads for each of the command queues.

11. The system of claim 10 , wherein the circuitry is further to:

increment the counter value associated with the command queue for the particular NAND device when a command from a host read is placed in the command queue for the particular NAND device; and

decrement the counter value associated with the command queue for the particular NAND device when the command from the host read is removed from the command queue for the particular NAND device.

12. The system of claim 11 , wherein the circuitry is further to:

determine that the current workload for the particular NAND device of the plurality of NAND devices is the random write workload if the counter value associated with the command queue for the particular NAND device is zero.

13. The system of claim 11 , wherein the circuitry is further to:

determine that the host read is pending for the particular NAND device if the counter value associated with the command queue for the particular NAND device is non-zero.

14. The system of claim 8 , wherein the controller and the NAND-based storage media are incorporated in a solid-state drive.

15. A method of controlling storage, comprising:

controlling access to NAND-based storage media that includes a plurality of NAND devices;

determining if a current workload for a particular NAND device of the plurality of NAND devices is a random write workload; and, if so determined,

disabling a program suspend operation for only the particular NAND device.

16. The method of claim 15 , further comprising:

determining if a host read is pending for the particular NAND device; and, if so determined,

enabling the program suspend operation for only the particular NAND device.

17. The method of claim 16 , further comprising:

maintaining a command queue for each of the plurality of NAND devices; and

maintaining a counter value associated with each of the command queues to count respective host reads for each of the command queues.

18. The method of claim 17 , further comprising:

incrementing the counter value associated with the command queue for the particular NAND device when a command from a host read is placed in the command queue for the particular NAND device; and

decrementing the counter value associated with the command queue for the particular NAND device when the command from the host read is removed from the command queue for the particular NAND device.

19. The method of claim 18 , further comprising:

determining that the current workload for the particular NAND device of the plurality of NAND devices is the random write workload if the counter value associated with the command queue for the particular NAND device is zero.

20. The method of claim 18 , further comprising:

determining that the host read is pending for the particular NAND device if the counter value associated with the command queue for the particular NAND device is non-zero.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 19, 2023
From: INTEL CORPORATION
To: SK HYNIX NAND PRODUCT SOLUTIONS CORP.
Reel/Frame 062437/0255 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 27, 2021
From: ANGOTH, VIVEK; CARLTON, DAVID; GANGADHAR, SARVESH; GOLEZ, MARKANTHONY; PELSTER, DAVID J.; VEMULA, NEELESH
To: INTEL CORPORATION
Reel/Frame 056059/0189 →
Continuity (1)
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