Display device
The disclosure relates to a display device which includes a substrate, pixels, a first insulating layer disposed on the substrate and including a recess, a first conductive layer disposed on the first insulating layer, a second conductive layer disposed between the first conductive layer and the substrate and electrically connected to the first conductive layer, a trace layer disposed between the first and second conductive layers and electrically connected to the first conductive layer, and a buffer layer disposed between the second conductive layer and the trace layer. The substrate includes a bent portion and a main portion and the pixels are disposed on the main portion. The first conductive layer is electrically connected to at least one of the pixels, and the first conductive layer includes a first portion disposed in the recess, and a second portion disposed out of the recess.
1. A display device, comprising:
a substrate, comprising a bent portion and a main portion;
a plurality of pixels, disposed on the main portion;
a first insulating layer, disposed on the substrate, wherein the first insulating layer comprises a recess;
a first conductive layer, disposed on the first insulating layer, wherein the first conductive layer is electrically connected to at least one of the plurality of pixels, the first conductive layer comprises a first portion and a second portion, the first portion of the first conductive layer is disposed in the recess, and the second portion of the first conductive layer is disposed out of the recess;
a second conductive layer, disposed between the first portion of the first conductive layer and the substrate, wherein the second conductive layer is electrically connected to the first conductive layer;
a trace layer, disposed between the first conductive layer and the second conductive layer, wherein the trace layer is electrically connected to the first conductive layer; and
a buffer layer, disposed between the second conductive layer and the trace layer,
wherein the plurality of pixels comprise:
an active layer, disposed on the buffer layer;
a gate layer, overlapping the active layer; and
a source/drain layer, electrically connected to the active layer.
2. The display device as claimed in claim 1 , further comprising:
an electrical circuit, disposed adjacent to a first edge of the substrate in a top view.
3. The display device as claimed in claim 2 , wherein the electrical circuit is a driving circuit.
4. The display device as claimed in claim 2 , further comprising:
a driver circuit, disposed adjacent to a second edge of the substrate in the top view, wherein the second edge is perpendicular to the first edge in the top view.
5. The display device as claimed in claim 4 , wherein the driver circuit is electrically connected to the electrical circuit and the plurality of pixels.
6. The display device as claimed in claim 1 , further comprising:
a second insulating layer, disposed on the first conductive layer, wherein at least a portion of the second insulating layer overlaps the first conductive layer.
7. The display device as claimed in claim 1 , further comprising:
a supporting member, disposed between the main portion and the bent portion along a direction perpendicular to the main portion.
8. The display device as claimed in claim 7 , wherein the supporting member has a first alignment mark.
9. The display device as claimed in claim 8 , wherein the bent portion of the substrate has a second alignment mark, and the second alignment mark corresponds to the first alignment mark.
10. The display device as claimed in claim 7 , further comprising:
a first adhesive, disposed between the supporting member and the main portion; and
a second adhesive, disposed between the supporting member and the bent portion.
11. The display device as claimed in claim 1 , wherein the trace layer and the second conductive layer are offset from one another along a direction.
12. The display device as claimed in claim 1 , wherein the buffer layer partially overlaps the second conductive layer.
13. A display device, comprising:
a substrate, having a main portion and a trace region; a first insulating layer; a first conductive layer; a second conductive layer; a trace layer; a buffer layer, wherein:
the first insulating layer is disposed on the substrate and comprises a plurality of recesses;
the first conductive layer is disposed on the first insulating layer and comprises first portions disposed in the recesses, and second portions disposed out of the plurality of recesses;
the second conductive layer is disposed between the first portions of the first conductive layer and the substrate, wherein the second conductive layer is electrically connected to the first conductive layer;
the trace layer is disposed between the first conductive layer and the second conductive layer, wherein the trace layer is electrically connected to the first conductive layer; and
the buffer layer is disposed between the second conductive layer and the trace layer;
a plurality of pixels, disposed on the main portion of the substrate; and
an electrical circuit, disposed on the substrate, wherein the first conductive layer is electrically connected to at least one of the plurality of pixels and the electrical circuit, wherein the plurality of pixels comprise:
an active layer, disposed on the buffer layer;
a gate layer, overlapping the active layer; and
a source/drain layer, electrically connected to the active layer.
14. The display device as claimed in claim 13 , further comprising:
a driver circuit, disposed on the substrate and electrically connected to the electrical circuit.
15. The display device as claimed in claim 13 , wherein a segment of the first portion of the first conductive layer connected to the second conductive layer extends further than another segment of the first portion of the first conductive layer connected to the trace layer.
16. The display device as claimed in claim 13 , wherein the trace layer and the second conductive layer are offset from one another along a direction.
17. The display device as claimed in claim 13 , wherein the buffer layer partially overlaps the second conductive layer.