System and method for communication between quantum controller modules
A channel between quantum controller modules (e.g., pulse processors) is operable to communicate high speed data required for processing qubit states that may be distributed across a quantum computer. The latency of the communication channel is deterministic and controllable according to a system clock domain.
1. A quantum controller comprising:
a pulse processor, wherein the pulse processor is operable to generate a first plurality of data in parallel according to one or more responses from a first group of one or more qubits; and
a first transceiver, wherein the first transceiver is operable to:
convert the first plurality of data into a first analog serial data stream,
transmit the first analog serial data stream, over a first communication channel, to a second transceiver,
receive from a third transceiver, via a second communication channel, a second analog serial data stream, and
convert the second analog serial data stream into a second plurality of data wherein the pulse processor is operable to receive the second plurality of data in parallel to control a second group of one or more qubits.
2. The quantum controller of claim 1 , wherein the second transceiver and the third transceiver are in a common device.
3. The quantum controller of claim 1 , wherein the second transceiver and the third transceiver are in different devices, and wherein the quantum controller and the different devices are operably coupled to a switch.
4. The quantum controller of claim 1 , wherein a full duplex channel comprises the first communication channel and the second communication channel.
5. The quantum controller of claim 1 , wherein the pulse processor is operable to generate the first plurality of data according to a sync operation with another device.
6. The quantum controller of claim 1 , wherein the first pulse processor is operable to generate the first plurality of data according to a quantum state estimate of from the first group of one or more qubits.
7. The quantum controller of claim 1 , wherein the pulse processor is operable to generate an electromagnetic signal for transmission to a qubit in the second group of one or more qubits.
8. The quantum controller of claim 1 , wherein the pulse processor is operable to generate an electromagnetic signal for transmission to a device that controls a qubit in the second group of one or more qubits, and wherein the device is operable to modulate a laser beam.
9. The quantum controller of claim 1 , wherein the pulse processor is operable to generate the first plurality of data according to a resonator, and wherein the resonator is operable to generate an electromagnetic signal according a state of a qubit in the first group of one or more qubits.
10. The quantum controller of claim 1 , wherein the first transceiver comprises a phase shifter operable to receive the first plurality of data from the pulse processor according to a first clock domain and transmit the first analog serial data stream according to a second clock domain.
11. The quantum controller of claim 1 , wherein the first transceiver comprises a phase shifter operable to receive the second analog serial data stream according to a first clock domain and transfer the second plurality of data to the pulse processor according to a second clock domain.
12. The quantum controller of claim 1 , wherein the first analog serial data stream and the second analog serial data stream are communicated at 16 Gb/s.
13. The quantum controller of claim 1 , wherein the first transceiver and the second transceiver are synchronized to a system clock.
14. The quantum controller of claim 1 , wherein upon initialization of the first transceiver and the second transceiver, a fixed latency is determined.
15. The quantum controller of claim 14 , wherein the fixed latency is periodically monitored to identify errors, and wherein the first transceiver and the second transceiver are calibrated if the fixed latency is maintained during a monitoring period.
16. The quantum controller of claim 1 , wherein upon initialization, the first transceiver and the second transceiver are operable communicate according to one or more fixed latencies.
17. The quantum controller of claim 1 , wherein upon initialization, the first transceiver and the second transceiver are operable to communicate according to a configured dynamic latency.
18. The quantum controller of claim 1 , wherein a latency between the first transceiver and the second transceiver is dynamically modifiable.
19. The quantum controller of claim 1 , wherein upon initialization, a plurality of transceivers are operable to communicate according to a fixed latency via a dedicated quantum control switch.
20. The quantum controller of claim 1 , wherein a latency between the first transceiver and the second transceiver is operably aligned via a shared timestamp.
21. The quantum controller of claim 1 , wherein the first transceiver and the second transceiver are stripped to a bare functionality to minimize a latency, and wherein the latency is periodically and dynamically tracked for errors.
22. The quantum controller of claim 1 , wherein the first transceiver comprises a phase shifter that is configured to write on a positive edge and read on a negative edge, and wherein a maximum clock domain crossing (CDC) transition is 1 clock cycle.
23. A method for communicating within a quantum controller comprising:
converting a plurality of data, from a first pulse processor, into an analog signal representing a serial data stream, wherein the plurality of data is associated with a first group of one or more qubits;
receiving the analog signal representing the serial data stream via a transmission medium;
converting the analog signal representing the serial data stream into a plurality of received data;
controlling a second group of one or more qubits according to the plurality of received data;
determining a fixed latency through a first transceiver and a second transceiver;
monitoring for a variation of the fixed latency during a period of time; and
repeating the determining and monitoring, if the fixed latency varies during the period of time.
24. The method of claim 23 , wherein the method comprises generating the plurality of data according to a quantum state estimate of the first group of one or more qubits.
25. The method of claim 23 , wherein the method comprises generating a signal that is controls the modulation of a laser beam.
26. The method of claim 23 , wherein the method comprises generating a result according to the plurality of received data and a quantum state estimate of the second group of one or more qubits.
27. The method of claim 23 , wherein the method comprises:
receiving the plurality of data according to a first clock domain; and
transferring the plurality of data according to a second clock domain.
28. The method of claim 27 , wherein the analog signal representing the serial data stream is transmitted according to a third clock domain.
29. The method of claim 23 , wherein the method comprises communicating the analog signal representing the serial data stream over an optical fiber.
30. The method of claim 23 , wherein the method comprises communicating the serial data stream over the transmission medium at 16 Gb/s.
31. The method of claim 23 , wherein the method comprises synchronizing the first transceiver and the second transceiver to a system clock.