IP Library Granted Patent US 11,528,545
Granted Patent B2
US 11,528,545 · App. 17/243,229 · Granted Dec 13, 2022

Single-ended readout of a differential MEMS device

Inventors: Wilfried Florian (Villach, AT); Niccoló De Milleri (Villach, AT); Philipp Greiner (Graz, AT); Andreas Wiesbauer (Poertschach, AT); Martin Wurzer (Munich, DE); Bert Zinserling (Oberpframmern, DE)
Assignee: Infineon Technologies AG
H04R1/08H03F3/183H03F2200/03H04R3/00H04R2201/003
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Quick Facts
Patent No.
US 11,528,545
App. No.
17/243,229
Granted
Dec 13, 2022
Kind
B2
Abstract

A circuit includes a first biasing voltage source, a second biasing voltage source, a first resistor device coupled between the first biasing voltage source and a first terminal of the circuit, a second resistor device coupled between the second biasing voltage source and a second terminal of the circuit, a third resistor device coupled between the second biasing voltage source and a third terminal, a first capacitor coupled between the third terminal and ground, and an amplifier having an input coupled to the second terminal and an output coupled to a circuit output.

Claims (42)

1. A circuit comprising:

a first biasing voltage source;

a second biasing voltage source;

a first resistor device coupled between the first biasing voltage source and a first terminal of the circuit;

a second resistor device coupled between the second biasing voltage source and a second terminal of the circuit;

a third resistor device coupled between the second biasing voltage source and a third terminal;

a first capacitor coupled between the third terminal and ground;

an amplifier having an input coupled to the second terminal, and an output coupled to a circuit output; and

a microelectromechanical (MEMS) device coupled to the first terminal, the second terminal, and the third terminal.

2. The circuit of claim 1 , further comprising a positive feedback path between the output of the amplifier and the second terminal, or between the output of the amplifier and the third terminal.

3. The circuit of claim 1 , wherein the MEMS device is packaged in a first package, and the first resistor device, the second resistor device, the third resistor device, the first capacitor, and the amplifier are packaged in a second package.

4. The circuit of claim 1 , further comprising a second capacitor coupled between the output of the amplifier and the third terminal.

5. The circuit of claim 1 , further comprising a filter resistor interposed between the output of the amplifier and the circuit output, and a filter capacitor coupled between the circuit output and ground.

6. The circuit of claim 5 , further comprising a second capacitor coupled between the output of the amplifier and the third terminal.

7. The circuit of claim 5 , further comprising a second capacitor coupled between the circuit output and the third terminal.

8. The circuit of claim 5 , further comprising a second capacitor coupled between the circuit output and the second terminal.

9. A method of biasing a microelectromechanical (MEMS) device having a first terminal, a second terminal, and a third terminal, the method comprising:

applying a first biasing voltage to the first terminal through a first impedance;

applying a second biasing voltage to the second terminal through a second impedance;

applying the second biasing voltage to the third terminal through a third impedance; and

buffering a voltage at the second terminal to provide an output voltage signal.

10. The method of claim 9 , further comprising packaging the MEMS device in a first package, and packaging the first impedance, the second impedance, and the third impedance in a second package.

11. The method of claim 9 , further comprising coupling a first capacitor to the third terminal.

12. The method of claim 9 , further comprising coupling a second capacitor between a source of the output voltage signal and the third terminal.

13. The method of claim 9 , further comprising filtering the output voltage signal to provide a filtered output voltage signal.

14. The method of claim 13 , further comprising coupling a second capacitor between a source of the output voltage signal and the third terminal.

15. The method of claim 13 , further comprising coupling a second capacitor between a source of the filtered output voltage signal and the third terminal.

16. The method of claim 13 , further comprising coupling a second capacitor between a source of the filtered output voltage signal and the second terminal.

17. A circuit comprising:

a microelectromechanical (MEMS) device having a first terminal and a second terminal;

a first resistor device coupled between a first biasing voltage source and the first terminal;

a second resistor device coupled between a second biasing voltage source and the second terminal;

an amplifier having an amplifier input coupled to the second terminal, and an amplifier output;

a filter having a filter input coupled to the amplifier output, and a filter output; and

a third resistor device coupled between the second biasing voltage source and a third terminal of the MEMS device.

18. A circuit comprising:

a microelectromechanical (MEMS) device having a first terminal and a second terminal;

a first resistor device coupled between a first biasing voltage source and the first terminal;

a second resistor device coupled between a second biasing voltage source and the second terminal;

an amplifier having an amplifier input coupled to the second terminal, and an amplifier output;

a filter having a filter input coupled to the amplifier output, and a filter output; and

a third terminal of the MEMS device directly coupled to a third biasing voltage source.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 19, 2021
From: FLORIAN, WILFRIED; DE MILLERI, NICCOLÓ; GREINER, PHILIPP; WIESBAUER, ANDREAS; WURZER, MARTIN; ZINSERLING, BERT
To: INFINEON TECHNOLOGIES AG
Reel/Frame 056290/0094 →
Continuity (1)
Related Publication 20220353594A1 · Nov 3, 2022
Cited By (1)
US 12,506,449