IP Library Granted Patent US 11,516,143
Granted Patent B2
US 11,516,143 · App. 17/248,133 · Granted Nov 29, 2022

Routing and control protocol for high-performance interconnect fabrics

Inventor: William B. Dress (Camas, WA)
Assignee: Lightfleet Corporation
H04L47/50H04L12/44
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Quick Facts
Patent No.
US 11,516,143
App. No.
17/248,133
Granted
Nov 29, 2022
Kind
B2
Abstract

Operating a computer network uses a routing and control protocol, the computer network having an interconnect fabric including routing and control distribution devices and fabric interface devices, each of the routing and control distribution devices and each of the fabric interface devices having a state machine having an input processing unit having parallel input buffers, an output processing unit having parallel output buffers and an arbiter; operating the state machine based on a set of instructions and a table located at the state machine; transferring data from the input processing unit to the output processing unit; choosing a highest priority currently flit occupied parallel input buffer located in the input processing unit for data transmission on a highest priority currently flit occupied channel; and; interrupting the highest currently flit occupied priority channel when one of the parallel input buffers is detected to contain a superseding even higher priority flit.

Claims (26)

1. A computer network, comprising:

an interconnect fabric including a plurality of routing and control distribution devices, and

a plurality of fabric interface devices coupled to the plurality of routing and control distribution devices;

wherein each of the plurality of routing and control distribution devices and each of the plurality of fabric interface devices further comprises a state machine further comprising:

a plurality of bidirectional transceiver ports, each bidirectional transceiver port of the plurality of bidirectional transceiver ports having receiving circuitry and transmitting circuitry;

an input processing unit coupled to the plurality of bidirectional transceiver ports; the input processing unit further comprising a plurality of parallel input buffers coupled to the plurality of bidirectional transceiver ports; wherein each parallel input buffer of a plurality of parallel input buffers queues flits of one of a plurality of priority channels;

an output processing unit coupled to the plurality of bidirectional transceiver ports; the output processing unit further comprising a plurality of parallel output buffers coupled to the plurality of bidirectional transceiver ports; wherein each parallel output buffer of the plurality of parallel output buffers, queues flits of one of the plurality of priority channels;

an arbiter coupled to the input processing unit and coupled to the output processing unit; wherein the arbiter transfers data from the input processing unit to the output processing unit based on a set of instructions and at least one table located at the state machine;

wherein the arbiter in a default interrupt mode chooses a highest priority currently flit occupied parallel input buffer for data transmission from the input processing unit to the output processing unit on a highest priority currently flit occupied channel; and

wherein the arbiter interrupts the highest priority currently flit occupied channel when one of the plurality of parallel input buffers is detected to contain a superseding even higher priority;

wherein the arbiter further comprises an interleave mechanism further comprising an encoder;

wherein when one of the plurality of parallel input buffers is detected to contain a sufficiently even higher priority flit that according to a set of instructions and at least one table located at the state machine is sufficient to change modes, the arbiter changes from the default interrupt mode to a transient switching mode to temporarily hold open a sufficiently even higher priority channel before automatically returning to the default interrupt mode; and

wherein the encoder inserts a cyclic redundancy code into a sufficiently even higher priority EOP flit to hold the sufficiently even higher priority channel open in the transient switching mode until transfer of the sufficiently even higher priority EOP flit is complete.

2. The computer network of claim 1 , further comprising a protected host coupled to the interconnect fabric, the protected host or server having an interconnect fabric manager that oversees an initialization process and maintains tables throughout the interconnect fabric that are responsible for dynamic routing of packets and control flits.

3. The computer network of claim 1 , further comprising an interconnect fabric manager server coupled to the interconnect fabric, the interconnect fabric manager server having an interconnect fabric manager that oversees an initialization process and maintains tables throughout the interconnect fabric that are responsible for dynamic routing of packets and control flits.

4. The computer network of claim 1 , wherein each of the plurality of parallel input buffers further comprises a first in first out buffer.

5. The computer network of claim 1 , wherein each of the plurality of parallel output buffers further comprises a first in first out buffer.

6. A method, comprising:

operating a computer network using a routing and control protocol, the computer network having an interconnect fabric including a plurality of routing and control distribution devices and a plurality of fabric interface devices coupled to the plurality of routing and control distribution devices, each of the plurality of routing and control distribution devices and each of the plurality of fabric interface devices having a state machine having an input processing unit having a plurality of parallel input buffers, an output processing unit having a plurality of parallel output buffers and an arbiter;

operating the state machine based on a set of instructions and at least one table located at the state machine;

transferring data from the input processing unit to the output processing unit using the arbiter based on the set of instructions and at least one table;

choosing a highest priority currently flit occupied parallel input buffer under a default interrupt mode located in the input processing unit for data transmission from the input processing unit to the output processing unit on a highest priority currently flit occupied channel using the arbiter;

interrupting the highest priority currently flit occupied channel when one of the plurality of parallel input buffers is detected to contain a superseding even higher priority flit using the arbiter; and

changing from the default interrupt mode to a transient switching mode at the state machine when one of the plurality of parallel input buffers is detected to contain a sufficiently even higher priority flit that according to the set of instructions and at least one table located at the state machine is sufficient to change modes to temporarily hold open a sufficiently even higher priority channel before automatically returning to the default interrupt mode.

7. The method of claim 6 , further comprising inserting a cyclic redundancy code into a sufficiently even higher priority EOP flit using an interleave mechanism located at the arbiter to hold the sufficiently even higher priority channel open in the transient switching mode until transfer of the sufficiently even higher priority EOP flit is complete.

8. A non-transitory computer readable media comprising executable programming instructions for performing the method of claim 6 .

Assignments (3)
BILL OF SALE FOLLOWING SALE IN FORECLOSURE Recorded Nov 29, 2023
From: HANSON, BROOKE
To: HANSON, BROOKE
Reel/Frame 065713/0113 →
SECURITY INTEREST Recorded May 24, 2023
From: LIGHTFLET CORPORATION
To: HANSON, BROOK
Reel/Frame 063749/0119 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 11, 2021
From: DRESS, WILLIAM B.
To: LIGHTFLEET CORPORATION
Reel/Frame 054877/0762 →
Continuity (5)
Continuation 16447844 · Jun 20, 2019
Continuation In Part PCTUS2019031052 · May 7, 2019
Continuation 15997573 · Jun 4, 2018
Provisional Application 62687785 · Jun 20, 2018
Related Publication 20210211388A1 · Jul 8, 2021