IP Library Granted Patent US 12,037,238
Granted Patent B2
US 12,037,238 · App. 17/257,214 · Granted Jul 16, 2024

Low-height optoelectronic modules and packages

Inventor: Javier Miguel Sànchez (Eindhoven, NL)
Assignee: ams Sensors Singapore Pte. Ltd.
B81B7/02B81B7/0032B81C1/00317B81C1/00333B81B2201/047B81B2207/012G02B26/001
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Quick Facts
Patent No.
US 12,037,238
App. No.
17/257,214
Granted
Jul 16, 2024
Kind
B2
Abstract

An optoelectronic module includes an optical filter and can have a relatively small overall height. The module includes a semiconductor die for the optical filter, where the die has a cavity in its underside. The cavity provides space to accommodate an optoelectronic device such as a light sensor or light emitter. Such an arrangement can reduce the overall height of the module, thereby facilitating its integration into a host device in which space is at a premium.

Claims (29)

1. A module comprising:

an optoelectronic device mounted on a substrate; and

a semiconductor die disposed over the optoelectronic device, the die including an optical filter at a first surface facing away from the optoelectronic device, the die further having a cavity in a second surface that faces the optoelectronic device such that the optoelectronic device is accommodated within an area defined by the cavity,

wherein the semiconductor die is a MEMS die that includes a silicon substrate, the cavity being in the silicone substrate.

2. The module of claim 1 wherein the optical filter includes a Fabry-Perot interferometer (FPI) tunable filter.

3. The module of claim 1 wherein the silicon substrate has an 100 orientation.

4. The module of claim 1 wherein the optoelectronic device comprises a light sensor.

5. The module of claim 1 wherein the optoelectronic device comprises a light source.

6. The module of claim 1 including an anti-reflection coating on an inner surface of the cavity.

7. A package comprising:

a housing including a lid attached to a substrate, the lid having an aperture therein;

an optoelectronic device within the housing, the optoelectronic device being mounted on the substrate and having an optical axis that intersects the aperture; and

a semiconductor die within the housing, the semiconductor die being disposed over the optoelectronic device, the die including an optical filter at a first surface facing away from the optoelectronic device, the die further having a cavity in a second surface that faces the optoelectronic device such that the optoelectronic device is accommodated within an area defined by the cavity.

8. An apparatus comprising:

a host device including a printed circuit board; and

the package of claim 7 mounted to the printed circuit board.

9. The apparatus of claim 8 further including a processor mounted to the printed circuit board and operable for communications with at least one of the optoelectronic device or the optical filter.

10. A method comprising:

providing a first wafer on which are mounted a plurality of optoelectronic devices;

providing a second wafer having a first surface on which there is a plurality of optical filters, the second wafer having a second surface in which there is a plurality of cavities, the second surface being on a side of the second wafer opposite from the first surface; and

attaching the first and second wafers to one another to form a wafer stack such that each of the optoelectronic devices is accommodated in a respective one of the cavities.

11. The method of claim 10 wherein the optical filters are Fabry-Perot interferometer (FPI) tunable filters, the method further including etching the cavities into the second surface of the second wafer.

12. The method of claim 11 further including separating the wafer stack into individual sub-assemblies each of which includes one of the FPI tunable filters disposed over one of the optoelectronic devices.

13. The method of claim 12 further including integrating one of the sub-assemblies into a packaged module.

14. The method of claim 10 wherein the second wafer comprises a silicon wafer.

15. The method of claim 14 wherein the second wafer comprises a silicon wafer having an (100) orientation.

16. The method of claim 14 including etching the cavities using a KOH etch.

17. The method of claim 10 wherein the first wafer is a printed circuit board wafer.

18. The method of claim 10 including applying an anti-reflection coating on inner surfaces of the cavities.

Assignments (2)
CHANGE OF NAME Recorded Nov 3, 2025
From: AMS SENSORS SINGAPORE PTE. LTD.
To: AMS-OSRAM ASIA PACIFIC PTE. LTD.
Reel/Frame 073476/0659 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 30, 2020
From: SÀNCHEZ, JAVIER MIGUEL
To: AMS SENSORS SINGAPORE PTE. LTD.
Reel/Frame 054874/0357 →
Continuity (2)
Provisional Application 62711698 · Jul 30, 2018
Related Publication 20210214214A1 · Jul 15, 2021