Surface mountable optoelectronic semiconductor device and method for manufacturing a surface mountable optoelectronic semiconductor devices

1. An optoelectronic semiconductor device which is surface-mountable, comprising:

at least one semiconductor chip which emits light during operation and comprises electrical contact pads,

an opaque base body laterally surrounding the at least one semiconductor chip so that side surfaces of the semiconductor chip are directly covered by the base body all around,

at least one electrical fanning layer with electrical conductor tracks, and

electrical connection pads for external electrical contacting of the semiconductor device,

wherein

the contact pads and the connection pads are located on different sides of the fanning layer,

the contact pads are electrically connected to the associated connection pads by means of the fanning layer,

the connection pads are expanded relative to the contact pads,

the base body extends between the semiconductor chip and the fanning layer and/or the contact pads are embedded in a chip potting of the semiconductor chip and the contact pads terminate flush with the chip potting, and

the at least one semiconductor chip is a laser diode, a superluminescent diode, or a light emitting diode and configured to emit the light in an infrared range, a visible range, or an ultraviolet range.

2. The optoelectronic semiconductor device according to claim 1 ,

wherein

the connection pads are enlarged relative to the associated contact pads and/or comprise a greater distance from one another,

the semiconductor chip is a flip chip,

the conductor tracks of the fanning layer and the connection pads are embedded in at least one embedding body which directly adjoins the base body, and

a semiconductor layer sequence of the semiconductor chip is located on a side of the contact pads facing away from the fanning layer, and

a main side of the semiconductor chip facing away from the contact pads is free of the base body.

3. The optoelectronic semiconductor device according to claim 1 ,

wherein the semiconductor chip is divided into a plurality of pixels and the pixels are electrically controllable independently of each other.

4. The optoelectronic semiconductor device according to claim 1 ,

comprising a plurality of said light emitting semiconductor chips,

wherein the semiconductor chips are embedded together in the base body, and

wherein there are altogether fewer connection pads than contact pads.

5. The optoelectronic semiconductor device according to claim 1 ,

comprising a plurality of said fanning layers,

wherein the conductor tracks in the different fanning layers extend at least partially differently from one another, and

wherein at least one partial layer of an embedding body is present per fanning layer.

6. The optoelectronic semiconductor device according to claim 1 ,

wherein adjacent fanning layers are electrically interconnected via electrical vias.

7. The optoelectronic semiconductor device according to claim 1 ,

wherein each fanning layer or each of the fanning layers together with the associated vias comprises a thickness of at most 20 m and/or of at most 50% of an average thickness of the at least one semiconductor chip.

8. The optoelectronic semiconductor device according to claim 1 ,

comprising at least one additional chip,

wherein the additional chip is selected from the group consisting of photodiode, phototransistor, IC chip, IC chip with integrated photodiode, temperature-dependent resistor, protection diode against damage by electrostatic discharges, memory chip, address chip, placeholder chip, and

wherein the additional chip or one of the additional chips is arranged laterally adjacent to the at least one semiconductor chip.

9. The optoelectronic semiconductor device according to claim 1 ,

comprising a plurality of said additional chips,

wherein at least one of the additional chips and the semiconductor chip or at least one of the semiconductor chips are disposed on different sides of the fanning layer.

10. The optoelectronic semiconductor device according to claim 1 ,

comprising at least one planar electrical interconnection line located only on a side of the semiconductor chip facing away from the fanning layer or at least one of the semiconductor chips on the base body,

wherein at least one interconnection line is electrically connected directly to the fanning layer.

11. The optoelectronic semiconductor device according to claim 1 ,

comprising at least one optical coating at the base body,

wherein the coating is selected from the following group: phosphor layer, organic or inorganic protective layer, color filter layer, diffuser layer, coloring layer, anti-reflective layer, dichroic layer,

wherein the coating covers the semiconductor chip or at least one of the semiconductor chips.

12. The optoelectronic semiconductor device according to claim 11 ,

wherein, viewed in plan view, a base surface of the semiconductor device is larger than a base surface of the at least one semiconductor chip by at most a factor of three, wherein the coating is a phosphor layer, and

wherein the at least one semiconductor chip or the coating terminates flush with the base body in the direction away from the connection pads.

13. The optoelectronic semiconductor device according to claim 1 ,

comprising a plurality of pixels for emitting light of an adjustable color,

wherein each pixel comprises a plurality of said semiconductor chips.

14. The optoelectronic semiconductor device according to claim 13 ,

wherein a distance between adjacent semiconductor chips within the pixels is equal to a distance between adjacent pixels.

15. The optoelectronic semiconductor device according to claim 1 ,

wherein an outer edge of the base body as viewed in plan on the light exit side is narrower than a distance between adjacent pixels, such that a plurality of the semiconductor devices are configured to be juxtaposed to arrange the pixels in a uniform pitch across the device.

16. A manufacturing method for optoelectronic semiconductor devices according to claim 1 , comprising the following steps in the order indicated:

A) providing the semiconductor chips,

B) embedding the semiconductor chips in the base body,

D) creating the fanning layer,

E) applying the connection pads to the finished fanning layer,

F) creating an opaque embedding body by casting, spraying or pressing, and

G) singulating into the semiconductor devices.

17. The method according to claim 16 ,

wherein at least steps A) to F) are carried out on a temporary auxiliary carrier,

wherein the auxiliary carrier is no longer present in the singulated semiconductor devices.

18. The method according to claim 16 ,

wherein between steps B) and D) in a step C) a planarization is performed, during which the base body and the semiconductor chips are reduced in thickness.

19. The method according to claim 16 ,

wherein in step B) at least one main surface of each of the semiconductor chips remains free of the base body and side surfaces of each of the semiconductor chips are covered directly and over their entire area by the base body.

20. An optoelectronic semiconductor device which is surface-mountable, comprising:

at least one semiconductor chip which emits light during operation and comprises electrical contact pads;

an opaque base body laterally surrounding the at least one semiconductor chip so that side surfaces of the semiconductor chip are directly covered by the base body all around;

at least one electrical fanning layer with electrical conductor tracks; and

electrical connection pads for external electrical contacting of the semiconductor device;

wherein

the contact pads and the connection pads are located on different sides of the fanning layer,

the contact pads are electrically connected to the associated connection pads by means of the fanning layer,

the connection pads are expanded relative to the contact pads,

the base body extends between the semiconductor chip and the fanning layer and/or the contact pads are embedded in a chip potting of the semiconductor chip and the contact pads terminate flush with the chip potting,

the base body, the fanning layer and an embedding body terminate flush with each other in a lateral direction, and

the at least one semiconductor chip is a laser diode, a superluminescent diode, or a light emitting diode and configured to emit the light in an infrared range, a visible range, or an ultraviolet range.