IP Library Granted Patent US 12,333,273
Granted Patent B2
US 12,333,273 · App. 17/279,096 · Granted Jun 17, 2025

Secure right shift computation system, secure division system, methods therefor, secure computation apparatus, and program

Inventor: Dai Ikarashi (Musashino, JP)
Assignee: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
G06F7/544G06F5/01H04L9/085
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 12,333,273
App. No.
17/279,096
Granted
Jun 17, 2025
Kind
B2
Abstract

The present invention implements high-speed right shift computation and division in secure computation. According to the present invention, a public value multiplication part calculates [a′]=[2 u a] from a distributed value [a] of a value “a.” A first conversion part converts [a′] into additive secret sharing. A right shift computation part calculates <s> i =<a′> i >>b+u. A second conversion part converts <s> into linear secret sharing. A first bit conversion part converts lower u bits of <a′> i into {a′ i mod 2 u }. A quotient transfer part 16 obtains lower u bits of −Σ i<m {a′ i mod 2 u } as {q}. A second bit conversion part converts lower b+u bits of <a′> i into {a′ iR }={a′ i mod 2 b+u }. An addition part calculates {z}=Σ i<m {a′ iR }+{q}, and obtains a bit sequence {z Q } of a (b+u)-th bit and after of {z}. A third conversion part converts {q} and {z Q } into linear secret sharing. An output computation part outputs [s]−[ 2 l−(b+u) q]+[z Q ] as [a>>b].

Claims (31)

1. A secure cryptographic right shift computation system comprising m secure computation apparatuses that perform a distributed secure computation by taking an input of a distributed value [a] of a value “a” and a shift amount “b,” and calculating a distributed value [a>>b] of a value obtained by shifting the value “a” by “b” bits toward right,

wherein [⋅] is a distributed value obtained by distributing a value “⋅” by first secret sharing, <⋅> is a distributed value obtained by distributing the value “⋅” by additive secret sharing among the m secure computation apparatuses, {⋅} is a distributed value obtained by distributing a bit expression of the value “⋅” among the m secure devices “⋅,” the distributed value [⋅] and the distributed value <⋅> can be mutually converted, “a” is an arbitrary value, “b” is a shift amount, “m” is a distribution number of three or more, “u” is an integer of log m or more, “l” is a bit number of the value “a,” and >> is a right shift operator, and

wherein the secure computation apparatuses are interconnected by a network to cooperate in calculating the distributed value, and each include processing circuitry configured to:

calculate a distributed value [a′]=[2 u a] by using the distributed value [a];

convert the distributed value [a′] into a distributed value <a′>=<a′> 0 , . . . , <a′> m−1 of the additive secret sharing;

generate, for each integer i of 0 or more and less than m, a distributed value <s>=<s> 0 , . . . , <s> m−1 by calculating <s> i =<a′> i >>b+u;

convert the distributed value <s> into a distributed value [s] of the first secret sharing;

convert lower u bits of a share <a′> i of the distributed value <a′> into a distributed value {a′ i mod 2 u } of a bit expression for each integer i of 0 or more and less than m;

calculate lower u bits of −Σ i<m {a′ i mod 2 u } to obtain as a distributed value {q} of a bit expression by using the distributed value {a′ i mod 2 u };

convert the distributed value {q} into a distributed value [q] of the first secret sharing; and

calculate [s]−[2 l−(b+u) q]+1 to obtain as the distributed value [a>>b] by using the distributed values [s] and [q].

2. The cryptographic secure right shift computation system according to claim 1 ,

wherein the processing circuitry is further configured to:

convert lower b+u bits of the share <a′> i into a distributed value {a′ iR }={a′ i mod 2b+u} of a bit expression for each integer i of 0 or more and less than m; and

calculate a distributed value {z}=Σ i<m {a′ iR }+{q} of a bit expression by using the distributed values {a′ iR } and {q}, and obtains a bit sequence of a (b+u)-th bit and after of the distributed value {z} as a distributed value {z Q },

wherein:

the processing circuitry converts the distributed values {q} and {z Q } into distributed values [q] and [z Q ] of the first secret sharing; and

the processing circuitry calculates [s]−[2 l−(b+u) q]+[z Q ] to obtain as the distributed value [a>>b] by using the distributed values [s], [q], and [z Q ].

3. A secure computation apparatus included in the cryptographic secure right shift computation system according to claim 1 .

4. A non-transitory computer-readable recording medium on which a program recorded thereon for causing a computer to function as the cryptographic secure computation apparatus according to claim 3 .

5. A cryptographic secure right shift computation method executed by a secure right shift computation system that includes m secure computation apparatuses that perform a distributed secure computation by taking an input of a distributed value [a] of a value “a” and a shift amount “b,” and calculating a distributed value [a>>b] of a value obtained by shifting the value “a” by “b” bits toward right,

wherein [⋅] is a distributed value obtained by distributing a value “⋅” by first secret sharing among the m secure computation apparatuses, <⋅> is a distributed value obtained by distributing the value “⋅” by additive secret sharing among the m secure computation apparatuses, {⋅} is a distributed value obtained by distributing a bit expression of the value “⋅,” among the m secure computation apparatuses “⋅” the distributed value and the distributed value <⋅> can be mutually converted, “a” is an arbitrary value, “b” is a shift amount, “m” is a distribution number of three or more, “u” is an integer of log m or more, “l” is a bit number of the value “a,” and >> is a right shift operator, and

wherein the secure right shift computation method comprising, by processing circuitry of each of the secure computation apparatuses which are interconnected by a network to cooperate in calculating the distributed value::

calculating, a distributed value [a′]=[ 2 u a] by using the distributed value [a];

converting, the distributed value [a′] into a distributed value <a′>=<a′> 0 , . . . <a′> m−1 of the additive secret sharing;

generating, for each integer i of 0 or more and less than m, a distributed value <s>=<s> 0 , . . . , <s> m−1 by calculating <s> i =<a′> i >>b+u;

converting, the distributed value <s> into a distributed value [s] of the first secret sharing;

converting, lower u bits of a share <a′> i of the distributed value <a′> into a distributed value {a′ i mod 2 u } of a bit expression for each integer i of 0 or more and less than m;

calculating, lower u bits of −Σ i<m {a′ i mod 2 u } to obtain as a distributed value {q} of a bit expression by using the distributed value {a′ i mod 2 u };

converting, the distributed value {q} into a distributed value [q] of the first secret sharing; and

calculating, [s]−[ 2 l−(b+u) q]+1 to obtain as the distributed value [a>>b] by using the distributed values [s] and [q].

Assignments (2)
CHANGE OF NAME Recorded Aug 20, 2025
From: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
To: NTT, INC.
Reel/Frame 072801/0812 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 24, 2021
From: IKARASHI, DAI
To: NIPPON TELEGRAPH AND TELEPHONE CORPORATION
Reel/Frame 055695/0085 →
Priority Claims (1)
JP 2018-191830 · Oct 10, 2018 · national
Continuity (1)
Related Publication 20220060318A1 · Feb 24, 2022
References Cited (12)
US 20150193633A1 · Chida et al. · 2015 [cited by applicant]
US 20190163933A1 · Hamada · 2019 [cited by examiner]
US 20190212986A1 · Araki et al. · 2019 [cited by applicant]
US 20190229904A1 · Hamada · 2019 [cited by examiner]
US 20230379151A1 · Ikarashi · 2023 [cited by examiner]
US 20230401033A1 · Ikarashi · 2023 [cited by examiner]
WO 2018034079A1 · 2018 [cited by applicant]
Boyle, Elette, et al. “Function secret sharing for mixed-mode and fixed-point secure computation.” Annual International Conference on the Theory and Applications of Cryptographic Techniques. Cham: Springer International… [cited by examiner]
Morita, Hiraku, et al. “Secure division protocol and applications to privacy-preserving chi-squared tests.” 2018 International Symposium on Information Theory and Its Applications (ISITA). IEEE, 2018. (Year: 2018). [cited by examiner]
Catrina et al., “Secure Computation With Fixed-Point Numbers”, International Conference on Financial Cryptography and Data Security FC2010, LNCS, vol. 6052, Springer, 2010, pp. 35-50. [cited by applicant]
Mishina et al., “Designs and Implementations of Efficient and Accurate Secret Logistic Regression”, Proceedings of Computer Security Symposium 2018 (IPSJ Symposium Series), vol. 2018, No. 2, Information Processing Socie… [cited by applicant]
Bogdanov et al., “High-Performance Secure Multi-Party Computation for Data Mining Applications,” International Journal of Information Security, vol. 11, Issue 6, pp. 403-418, Nov. 2012. [cited by applicant]