IP Library Granted Patent US 11,412,243
Granted Patent B2
US 11,412,243 · App. 17/299,812 · Granted Aug 9, 2022

Video decoding apparatus

Inventors: Takeshi Chujoh (Sakai, JP); Eiichi Sasaki (Sakai, JP); Tomonori Hashimoto (Sakai, JP); Tomoko Aono (Sakai, JP); Tomohiro Ikai (Sakai, JP)
Assignees: SHARP KABUSHIKI KAISHA; FG INNOVATION COMPANY LIMITED
H04N19/44H04N19/105H04N19/109H04N19/139H04N19/172H04N19/52H04N19/70
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 11,412,243
App. No.
17/299,812
Granted
Aug 9, 2022
Kind
B2
Abstract

An image decoding apparatus is implemented that can suppress a decrease in coding efficiency in a case that a high compression rate is achieved. The image decoding apparatus includes a parameter decoder, and the parameter decoder decodes a skip flag indicating whether a skip mode is applied, and in a case that the skip flag does not indicate the skip mode, decodes a merge flag indicating whether a merge mode is applied, and in a case that the merge flag does not indicate the merge mode, decodes an MMVD flag indicating whether an MMVD mode is applied.

Claims (30)

1. A video decoding apparatus comprising,

a parameter decoding circuit configured to decode parameters for generating a prediction image in an MMVD mode; and

an MMVD prediction circuit configured to obtain motion vectors by adding an L0 vector difference or an L1 vector difference to motion vectors for merging,

wherein the parameter decoding circuit decodes a first index specifying an index in a merge candidate list, a second index specifying a length of the L0 vector difference or the L1 vector difference, and a third index specifying a direction of the L0 vector difference or the L1 the vector difference,

the MMVD prediction circuit

derives the motion vectors for merging from the first index,

derives a first vector from the second index and the third index,

in a case that a distance between a target picture and a L0 picture is greater than a distance between the target picture and a L1 picture, sets the L0 vector difference equal to the first vector, and derives the L1 vector difference by scaling the first vector,

in a case that a distance between a target picture and a L0 picture is less than a distance between a target picture and an L1 picture, sets the L1 vector difference equal to the first vector, and derives the L0 vector difference by scaling the first vector.

2. The video decoding apparatus according to the claim 1 ,

wherein, in a case that a distance between a target picture and the L0 picture is equal to a distance between the target picture and the L1 picture, and both the L0 picture and the L1 picture are located in same direction against the target picture in time order, the MMVD prediction circuit sets the L0 vector difference and the L1 vector difference equal to the first vector.

3. A video decoding method comprising,

decoding parameters for generating a prediction image in an MMVD mode;

decoding a first index specifying an index in a merge candidate list, a second index specifying a length of an L0 vector difference or an L1 vector difference, and a third index specifying a direction of the L0 vector difference of the L1 vector difference;

deriving motion vectors for merging from the first index;

deriving a first vector from the second index and the third index;

in a case that a distance between a target picture and a L0 picture is greater than a distance between the target picture and a L1 picture, setting the L0 vector difference equal to the first vector, and deriving the L1 vector difference by scaling the first vector;

in a case that the distance between the target picture and the L0 picture is less than the distance between the target picture and the L1 picture, setting the L1 vector difference equal to the first vector, and deriving the L0 vector difference by scaling the first vector; and

obtaining motion vectors motion vectors by adding the L0 vector difference or the L1 vector difference to the motion vectors for merging.

4. The video decoding apparatus according to the claim 1 ,

wherein, in a case that the distance between the target picture and the L0 picture is equal to the distance between the target picture and the L1 picture, and the L0 picture, the target picture, and the L1 picture are arranged in time order, the MMVD prediction circuit sets the L0 vector difference equal to the first vector, and the L1 vector difference is set equal to a result of multiplying the first vector by −1.

5. A video coding apparatus comprising:

a parameter coding circuit configured to code parameters for generating a prediction image in an MMVD mode; and

an MMVD prediction circuit configured to obtain motion vectors by adding an L0 vector difference or an L1 vector difference to motion vectors for merging; wherein

the parameter coding circuit codes a first index specifying an index in a merge candidate list, a second index specifying a length of the L0 vector difference or the L1 vector difference, and a third index specifying a direction of the L0 vector difference or the L1 vector difference; and

the MMVD prediction circuit:

derives the motion vectors for merging from the first index;

derives a first vector from the second index and the third index;

in a case that a distance between a target picture and a L0 picture is greater than a distance between the target picture and an L1 picture, sets the L0 vector difference equal to the first vector, and derives the L1 vector difference by scaling the first vector; and

in a case that the distance between the target picture and the L0 picture is less than the distance between the target picture and the L1 picture, sets the L1 vector difference equal to the first vector, and derives the L0 vector difference by scaling the first vector.

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 31, 2023
From: SHARP KABUSHIKI KAISHA; SHARP CORPORATION
To: SHARP KABUSHIKI KAISHA
Reel/Frame 063815/0589 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 15, 2023
From: SHARP KABUSHIKI KAISHA; FG INNOVATION COMPANY LIMITED
To: SHARP KABUSHIKI KAISHA; SHARP CORPORATION
Reel/Frame 062389/0715 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 12, 2021
From: SHARP KABUSHIKI KAISHA
To: SHARP KABUSHIKI KAISHA; FG INNOVATION COMPANY LIMITED
Reel/Frame 057763/0036 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 4, 2021
From: CHUJOH, TAKESHI; SASAKI, EIICHI; HASHIMOTO, TOMONORI; AONO, TOMOKO; IKAI, TOMOHIRO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 056436/0732 →
Cited By (1)
US 12,238,299