IP Library Granted Patent US 12,267,409
Granted Patent B2
US 12,267,409 · App. 17/304,011 · Granted Apr 1, 2025

Increased data integrity for authenticated encryption algorithms

Inventors: David Joseph Clinton (Coopersburg, PA); Patrick Bailey (Port Coquitlam, CA)
Assignee: Microchip Technology Incorporated
H04L9/0637G06F11/1004G06F13/4027G06F13/4282H04L9/0631G06F2213/0026
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Quick Facts
Patent No.
US 12,267,409
App. No.
17/304,011
Granted
Apr 1, 2025
Kind
B2
Abstract

One or more examples relate, generally, to systems, methods and devices for performing authenticated encryption that provides assurance of the authenticity of data through the encryption and decryption processes.

Claims (27)

1. An apparatus, comprising:

a processor configured to:

generate a receiver modified block of data at least partially responsive to adding an error detecting code to a block of data, the receiver modified block of data including the error detecting code;

generate a receiver authentication code at least partially responsive to the receiver modified block of data; and

generate an indication of a difference between the receiver authentication code and a transmitter authentication code.

2. The apparatus of claim 1 , wherein the processor is configured to:

generate a plain text data at least partially responsive to applying a decryption portion of an authenticated decryption algorithm to a cipher text data included with an authenticated encrypted block of data; and

generate the error detecting code at least partially responsive to the plain text data.

3. The apparatus of claim 2 , wherein the processor is configured to perform an algorithm for generating the error detecting code from the plain text data.

4. The apparatus of claim 2 , wherein the authenticated decryption algorithm is AES-GCM.

5. The apparatus of claim 1 , wherein the processor is provided at a communication system.

6. The apparatus of claim 5 , wherein the communication system is for a Compute Express Link (CXL) interconnect.

7. The apparatus of claim 5 , wherein the communication system is for a Peripheral Component Interconnect Express (PCIe) interconnect.

8. The apparatus of claim 1 , wherein the adding the error detecting code to the block of data comprises adding the error detecting code to a portion of the block of data for additional authenticated data.

9. A method, comprising:

generating a receiver modified block of data at least partially responsive to adding a receiver error detecting code to a block of data, the receiver modified block of data including the receiver error detecting code;

generating a receiver authentication code at least partially responsive to the receiver modified block of data; and

detecting a presence or absence of an erred data in the block of data at least partially responsive a difference between the receiver authentication code and a transmitter authentication code.

10. The method of claim 9 , comprising:

generating a plain text data at least partially responsive to applying a decryption portion of an authenticated decryption algorithm to a cipher text data included with an authenticated encrypted block of data; and

generating the receiver error detecting code at least partially responsive to the plain text data.

11. The method of claim 10 , wherein the authenticated decryption algorithm is AES-GCM.

12. The method of claim 9 , comprising: generating the receiver error detecting code by applying a derivation function to a plain text data.

13. The method of claim 9 , comprising receiving an authenticated encrypted block of data at a communication system.

14. The method of claim 13 , wherein the communication system is for a Compute Express Link (CXL) interconnect.

15. The method of claim 13 , wherein the communication system is for a Peripheral Component Interconnect Express (PCIe) interconnect.

16. The method of claim 9 , wherein the adding the receiver error detecting code to the block of data comprises adding the receiver error detecting code to a portion of the block of data for associated data.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 11, 2021
From: CLINTON, DAVID JOSEPH; BAILEY, PATRICK
To: MICROCHIP TECHNOLOGY INCORPORATED
Reel/Frame 056520/0340 →
Continuity (2)
Provisional Application 62705194 · Jun 15, 2020
Related Publication 20210391978A1 · Dec 16, 2021
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