IP Library Granted Patent US 11,537,296
Granted Patent B2
US 11,537,296 · App. 17/325,730 · Granted Dec 27, 2022

Storage device and operating method thereof

Inventors: Han Bin Lee (Gyeonggi-do, KR); Hyo Jae Lee (Gyeonggi-do, KR)
Assignee: SK hynix Inc.
G06F3/0619G06F3/064G06F3/0632G06F3/0649G06F3/0659G06F3/0673
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Quick Facts
Patent No.
US 11,537,296
App. No.
17/325,730
Granted
Dec 27, 2022
Kind
B2
Abstract

A storage device may include a memory device and a memory controller. The memory device may include a plurality of data blocks, a plurality of replacement blocks to replace bad blocks, and a system block configured to store default system information. The memory controller may store, based on a result of comparing a lifetime of the memory device with a reference value, update system information corresponding to an update of the default system information, in a selected replacement block among the plurality of replacement blocks. The memory controller may control the memory device to set the selected replacement block as a target system block. The default system information may include one or more parameters corresponding to at least one operation among a read operation, a program operation, and an erase operation of the memory device.

Claims (46)

1. A storage device comprising:

a memory device including a plurality of data blocks, a plurality of replacement blocks to replace bad blocks, and a system block configured to store default system information; and

a memory controller configured to store, based on a result of comparing a lifetime of the memory device with a reference value, update system information corresponding to an update of the default system information, in a selected replacement block among the plurality of replacement blocks, and to control the memory device to set the selected replacement block as a target system block, wherein the default system information includes one or more parameters corresponding to at least one operation among a read operation, a program operation, and an erase operation of the memory device.

2. The storage device of claim 1 , wherein

the memory device includes a system register configured to store the one or more parameters, and

the memory controller includes:

a device manager configured to manage lifetime information of the memory device; and

a system block controller configured to provide the memory device with a reset command to load the default system information into the system register, after power on of the memory device.

3. The storage device of claim 2 , wherein the device manager is configured to determine the lifetime of the memory device based on an erase and write count of one or more of the plurality of data blocks.

4. The storage device of claim 2 , wherein

the system block controller is configured to update the reference value after the system block controller performs a system block changing operation, and

the system block changing operation includes setting the selected replacement block as the target system block.

5. The storage device of claim 4 , wherein the system block controller is configured to:

store system information, obtained by updating the update system information again, in another replacement block different from the selected replacement block, among the plurality of replacement blocks, based on a result of comparing the lifetime of the memory device with the updated reference value; and

control the memory device to set the another replacement block as the target system block.

6. The storage device of claim 2 , wherein the memory device further includes a command processor configured to load the default system information stored in the system block into the system register in response to the reset command.

7. The storage device of claim 6 , wherein

after the system block controller provides the reset command to the memory device, the system block controller is configured to provide the memory device with a system block read command to load the update system information stored in the target system block, into the system register.

8. The storage device of claim 7 , wherein the command processor is configured to change the default system information loaded into the system register to correspond to the update system information, in response to the system block read command.

9. The storage device of claim 6 , wherein

the memory device further includes a device information storage configured to store the lifetime information of the memory device, which is received from the memory controller, and

the command processor is configured to change the default system information loaded into the system register to the update system information stored in the target system block, based on the result of comparing the lifetime of the memory device with the reference value.

10. The storage device of claim 1 , wherein the one or more parameters corresponding to the at least one operation include information on a voltage to be used in the at least one operation and information on voltage applying time.

11. The storage device of claim 1 , wherein the update system information includes

one or more predetermined parameters corresponding to the lifetime of the memory device, or

one or more parameters obtained by updating the one or more parameters in the default system information as the lifetime of the memory device elapses.

12. The storage device of claim 1 , wherein the system block is included in a Content Addressable Memory (CAM) area.

13. A method for operating a memory device, the method comprising:

storing, based on a result of comparing a lifetime of the memory device with a reference value, update system information corresponding to an update of default system information stored in a system block, in a selected replacement block among a plurality of replacement blocks for replacing bad blocks, and

setting the selected replacement block as a target system block, wherein the default system information includes one or more parameters corresponding to at least one operation among a read operation, a program operation, and an erase operation of the memory device.

14. The method of claim 13 , wherein

the memory device includes a system register configured to store the one or more parameters, and

the method further comprises loading the default system information into the system register, after power on of the memory device.

15. The method of claim 14 , further comprising

replacing the default system information loaded into the system register with the update system information stored in the target system block, based on the result of comparing the lifetime of the memory device with the reference value.

16. The method of claim 13 , further comprising

determining the lifetime of the memory device based on an erase and write count of a plurality of data blocks of the memory device.

17. The method of claim 13 , further comprising

updating the reference value after the system block changing operation, wherein the system block changing operation includes setting the selected replacement block as a target system block.

18. The method of claim 17 , further comprising:

storing system information, obtained by updating the update system information again, in another replacement block different from the selected replacement block, among the plurality of replacement blocks, based on a result of comparing the lifetime of the memory device with an updated reference value; and

setting the another replacement block as the target system block.

19. The method of claim 13 , wherein the one or more parameters corresponding to the at least one operation include information on voltage to be used in the at least one operation and information on voltage applying time.

20. The method of claim 13 , wherein the update system information includes

one or more predetermined parameters corresponding to the lifetime of the memory device, or

one or more parameters obtained by updating the one or more parameters in the default system information as the lifetime of the memory device elapses.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 7, 2024
From: SK HYNIX INC.
To: MIMIRIP LLC
Reel/Frame 067335/0246 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 20, 2021
From: LEE, HAN BIN; LEE, HYO JAE
To: SK HYNIX INC.
Reel/Frame 056320/0175 →
Priority Claims (1)
KR 10-2020-0150251 · Nov 11, 2020 · national
Continuity (1)
Related Publication 20220147250A1 · May 12, 2022