Sequential write and sequential write verify in memory device

1. An apparatus comprising:

a data line;

a first memory cell included in a first memory cell string;

a second memory cell included in a second memory cell string;

an access line shared by the first and second memory cells; and

a module to:

change a value of a threshold voltage of the first memory cell during a first time interval of an operation of the apparatus;

change a value of a threshold voltage of the second memory cell during a second time interval of the operation; and

determine, during a third time interval after the first and second time intervals, whether the first memory cell reaches a first target threshold voltage and whether the second memory cell reaches a second target voltage.

2. The apparatus of claim 1 , wherein the module is configured to:

apply a first programming voltage to the access line during the first time interval;

apply a second programming voltage to the access line during the second time interval, wherein first and second programming voltages have a same value.

3. The apparatus of claim 2 , wherein the module is configured to apply a positive voltage to the access line between the first and second time intervals.

4. The apparatus of claim 1 , wherein the module is configured to:

apply a voltage to the access line during the third time interval; and

keep the voltage at a positive value during the third time interval.

5. The apparatus of claim 4 , wherein the module is configured to couple the access line to ground between the second time interval and the third time interval.

6. The apparatus of claim 1 , wherein the module is configured to:

increase the value of the threshold voltage of the first memory cell during the first time interval; and

increase the value of the threshold voltage of the second memory cell during the second time interval.

7. The apparatus of claim 1 , wherein the module is configured to:

cause the value of the threshold voltage of the first memory cell to change from a first negative value to a first positive value during the first time interval; and

cause the value of the threshold voltage of the second memory cell to change from a second negative value to a second positive value during the second time interval.

8. The apparatus of claim 1 , wherein the first and second time intervals occur in a write stage of the operation, and the third time interval occurs in a write verify stage of the operation.

9. An apparatus comprising:

a data line;

a first memory cell included in a first memory cell string;

a second memory cell included in a second memory cell string;

an access line shared by the first and second memory cells; and

a module to:

change a value of a threshold voltage of the first memory cell during a first time interval of an operation of the apparatus;

change a value of a threshold voltage of the second memory cell during a second time interval of the operation;

couple the data line to a first page buffer during a third time interval after the first and second time intervals;

couple the data line to a second page buffer during a fourth time interval after the third time interval;

determine a threshold voltage of the first memory cell responsive to information in the first page buffer during the third time interval; and

determine a threshold voltage of the second memory cell responsive to information in the second page buffer during the fourth time interval.

10. The apparatus of claim 9 , further comprising a transistor, wherein the first buffer is coupled to the data line through the transistor; and

the second buffer is coupled to the data line through the transistor.

11. The apparatus of claim 9 , wherein the module is configured to:

apply a first voltage to the access line during each of the first and second time intervals; and

apply a second voltage less than the first voltage to the access line during each of the third and fourth time intervals.

12. The apparatus of claim 11 , wherein the module is configured to apply a positive voltage to the access line between the first and second time intervals.

13. The apparatus of claim 11 , wherein the module is configured to couple the access line to ground between the first and second time intervals.

14. The apparatus of claim 9 , wherein the module is configured to:

apply a voltage to the access line during the third and fourth time intervals; and

keep the voltage at a positive value during the third and fourth time intervals.

15. The apparatus of claim 14 , wherein the module is configured to couple the access line to ground between the first and second time intervals.

16. The apparatus of claim 9 , wherein the each of the first and second memory cells includes an erase state before the first time interval.

17. An apparatus comprising:

a data line;

a first memory cell included in a first memory cell string;

a second memory cell included in a second memory cell string;

an access line shared by the first and second memory cells;

a voltage generator to provide a first voltage to the access line during a first operation of storing information in the first and second memory cells and to provide a second voltage to the access line during a second operation of determining whether each of the first and second memory cells reaches a target state; and

a module to:

to keep the voltage generator from switching a value of the first voltage to ground during the first operation; and

to keep the voltage generator from switching a value of the second voltage to ground during the second operation.

18. The apparatus of claim 17 , wherein the first and second voltages have different values.

19. The apparatus of claim 17 , wherein the module is configured to keep the value of the second voltage unchanged during the second operation.

20. The apparatus of claim 17 , wherein the voltage generator includes a first charge pump circuit to generate the first voltage, and a second charge pump circuit to generate the second voltage.