IP Library Granted Patent US 12,132,469
Granted Patent B2
US 12,132,469 · App. 17/336,005 · Granted Oct 29, 2024

Galvanically isolated driver package for switch drive circuit with power transfer

Inventors: Andrew Thompson (Cheshire, GB); Joe Duigan (Peymeinade, FR); Karl Rinne (Cork, GB)
Assignee: Allegro MicroSystems, LLC
H03K17/0424H01F5/04H01F17/00H01F27/00H01F27/02H01F27/027H01F27/28H01F27/2895H01F27/40H01F41/04H03K17/691
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Quick Facts
Patent No.
US 12,132,469
App. No.
17/336,005
Granted
Oct 29, 2024
Kind
B2
Abstract

The present application provides a packaged gate drive circuit having a transformer. The transformer which is used to transfer both signals and power from a primary side to a secondary side. The windings of the transformer are formed using a combination of tracks and wirebond wires. The transformer is positioned in a well formed using a first insulating material and covered with a second insulating material.

Claims (19)

1. An isolated gate drive comprising:

a transformer having a core, a primary winding and a secondary winding;

a substrate having a first major surface and a second major surface opposing the first major surface;

a first insulating material provided on said substrate, the first insulating material in combination with the first major surface of the substrate defining a well, wherein the first insulating material covers the first major surface outside of the well;

wherein the core is disposed within the well and one or both of the primary and secondary windings are partially formed by one or more wirebond wires bonded to landing zones on the first major surface; and

a second insulating material disposed in the well and covering the wirebond wires and core, wherein the second insulating material is softer than the first insulating material.

2. The gate drive of claim 1 , wherein the core is fixed to the first major surface with a first adhesive.

3. The gate drive of claim 1 , further comprising contacts for making external electrical connections, wherein the contacts are provided on the second major surface of the substrate.

4. The gate drive of claim 1 , wherein the wirebond wires are insulated.

5. The gate drive of claim 1 , wherein the primary and secondary windings are completed by tracks buried within the substrate.

6. The gate drive of claim 1 , further comprising:

a primary side circuit, wherein the primary side circuit is covered by the first insulating material.

7. The gate drive of claim 6 , wherein the primary side circuit includes a first integrated circuit mounted to the first major surface.

8. The gate drive of claim 6 , further comprising:

a secondary side circuit, wherein the secondary side circuit is covered by the first insulating material.

9. The gate drive of claim 8 , wherein the secondary side circuit includes a second integrated circuit mounted to the first major surface.

10. The gate drive of claim 9 , wherein the primary side circuit is galvanically isolated from the secondary side circuit.

11. The gate drive of claim 10 , wherein the gate drive is configured to pass both signals and power from the primary side circuit to the secondary side circuit using the transformer.

12. The gate drive of claim 1 , further comprising a cap covering the first insulating material.

Assignments (3)
PATENT SECURITY AGREEMENT Recorded Jun 22, 2023
From: ALLEGRO MICROSYSTEMS, LLC
To: MORGAN STANLEY SENIOR FUNDING, INC., AS THE COLLATERAL AGENT
Reel/Frame 064068/0459 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 30, 2023
From: HEYDAY INTEGRATED CIRCUITS; ALLEGRO MICROSYSTEMS FRANCE SAS; ALLEGRO MICROSYSTEMS EUROPE LIMITED; ALLEGRO MICROSYSTEMS IRELAND, LIMITED
To: ALLEGRO MICROSYSTEMS, LLC
Reel/Frame 063793/0209 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 2, 2021
From: THOMPSON, ANDREW; DUIGAN, JOE; RINNE, KARL
To: HEYDAY INTEGRATED CIRCUITS SAS
Reel/Frame 056748/0899 →
Priority Claims (1)
GB 2008310 · Jun 2, 2020 · national
Continuity (1)
Related Publication 20210376822A1 · Dec 2, 2021