IP Library Granted Patent US 11,683,770
Granted Patent B2
US 11,683,770 · App. 17/337,346 · Granted Jun 20, 2023

Synchronization channel and system acquisition for internet of things communications in a shared spectrum

Inventors: Srinivas Yerramalli (Hyderabad, IN); Arumugam Chendamarai Kannan (San Diego, CA); Chih-Hao Liu (San Diego, CA); Tamer Kadous (San Diego, CA)
Assignee: QUALCOMM Incorporated
H04W56/0015H04J11/0069H04J11/0073H04J11/0076H04L5/0048H04L27/2613H04L27/2614H04W16/14H04J2011/0096H04W72/0453H04W72/27
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Quick Facts
Patent No.
US 11,683,770
App. No.
17/337,346
Granted
Jun 20, 2023
Kind
B2
Abstract

Methods, systems, and devices for wireless communication are described. A base station may identify a first synchronization sequence and generate a second synchronization sequence based at least in part on the first synchronization sequence. The base station may map the first synchronization sequence to a first resource block of a synchronization channel associated with a first frequency sub-band of a shared radio frequency spectrum band and the second synchronization sequence to a second resource block associated with a second frequency sub-band of the synchronization channel. The base station may then transmit the first synchronization sequence and the second synchronization sequence concurrently over the synchronization channel using the first resource block and the second resource block according to the mapping. In some cases, the second synchronization sequence may be generated by applying a first phase shift to the first synchronization sequence.

Claims (33)

1. A method for wireless communication, comprising:

identifying a first synchronization sequence;

generating a second synchronization sequence by applying a first phase shift to the first synchronization sequence;

generating a third synchronization sequence by applying a second phase shift to the second synchronization sequence, the second phase shift being different from the first phase shift;

mapping the first synchronization sequence to a first resource block of a synchronization channel associated with a first frequency sub-band of a shared radio frequency spectrum band, the second synchronization sequence to a second resource block associated with a second frequency sub-band of the synchronization channel, and the third synchronization sequence to a third resource block of the synchronization channel; and

transmitting the first synchronization sequence and the second synchronization sequence concurrently over the synchronization channel using the first resource block and the second resource block according to the mapping.

2. The method of claim 1 , further comprising:

transmitting the third synchronization sequence using the third resource block;

wherein transmitting the third synchronization sequence is concurrent with transmitting the first synchronization sequence and the second synchronization sequence.

3. The method of claim 1 , wherein the second phase shift is a multiple of the first phase shift.

4. The method of claim 1 , wherein the first phase shift is different than the second phase shift, and the second phase shift is based at least in part on a payload of a secondary synchronization signal (SSS).

5. The method of claim 1 , wherein the first phase shift is based at least in part on a bandwidth of the shared radio frequency spectrum band.

6. The method of claim 1 , wherein the first synchronization sequence comprises at least one of a primary synchronization signal (PSS), a secondary synchronization signal (SSS), a physical broadcast channel (PBCH), or combinations thereof.

7. The method of claim 6 , further comprising:

generating the second synchronization sequence is further based at least in part on a content of the PSS, the SSS, or the PBCH.

8. An apparatus for wireless communication, comprising:

a processor;

memory in electronic communication with the processor; and

instructions stored in the memory, wherein the instructions are executable by the processor to:

identify a first synchronization sequence;

generate a second synchronization sequence by applying a first phase shift to the first synchronization sequence;

generate a third synchronization sequence by applying a second phase shift to the second synchronization sequence, the second phase shift different from the first phase shift;

map the first synchronization sequence to a first resource block of a synchronization channel associated with a first frequency sub-band of a shared radio frequency spectrum band, the second synchronization sequence to a second resource block associated with a second frequency sub-band of the synchronization channel, and the third synchronization sequence to a third resource block of the synchronization channel; and

transmit the first synchronization sequence and the second synchronization sequence concurrently over the synchronization channel using the first resource block and the second resource block according to the mapping.

9. The apparatus of claim 8 , wherein the instructions are further executable by the processor to:

transmit the third synchronization sequence using the third resource block;

wherein transmitting the third synchronization sequence is concurrent with transmitting the first synchronization sequence and the second synchronization sequence.

10. The apparatus of claim 8 , wherein the second phase shift is a multiple of the first phase shift.

11. The apparatus of claim 8 , wherein the first phase shift is different than the second phase shift, and the second phase shift is based at least in part on a payload of a secondary synchronization signal (SSS).

12. The apparatus of claim 8 , wherein the first phase shift is based at least in part on a bandwidth of the shared radio frequency spectrum band.

13. The apparatus of claim 8 , wherein the first synchronization sequence comprises at least one of a primary synchronization signal (PSS), a secondary synchronization signal (SSS), a physical broadcast channel (PBCH), or combinations thereof.

14. The apparatus of claim 13 , wherein the instructions are further executable by the processor to:

generate the second synchronization sequence is further based at least in part on a content of the PSS, the SSS, or the PB CH.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 2, 2021
From: YERRAMALLI, SRINIVAS; CHENDAMARAI KANNAN, ARUMUGAM; LIU, CHIH-HAO; KADOUS, TAMER
To: QUALCOMM INCORPORATED
Reel/Frame 056420/0536 →
Continuity (3)
Division 15989698 · May 25, 2018
Provisional Application 62520386 · Jun 15, 2017
Related Publication 20210297972A1 · Sep 23, 2021