IP Library Granted Patent US 11,836,502
Granted Patent B2
US 11,836,502 · App. 17/346,931 · Granted Dec 5, 2023

Multi-boot system and method for a baseboard management controller (BMC)

Inventors: Akkiah Choudary Maddukuri (Austin, TX); Chandrasekhar Mugunda (Austin, TX); Prashanth Giri (Round Rock, TX); Eugene David Cho (Austin, TX); Donald W. Gerhart (Leander, TX); Yogesh Prabhakar Kulkarni (Round Rock, TX)
Assignee: Dell Products L.P.
G06F9/441G06F9/4418
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Quick Facts
Patent No.
US 11,836,502
App. No.
17/346,931
Granted
Dec 5, 2023
Kind
B2
Abstract

An Information Handling System (IHS) includes multiple hardware devices, and a baseboard Management Controller (BMC) in communication with the plurality of hardware devices. The BMC includes executable instructions for beginning execution of a first BMC firmware stack, and during execution of the first BMC firmware stack, halt execution of the first BMC firmware stack, and begin execution of a second BMC firmware stack. At least a portion of the executable instructions used to generate the first BMC firmware stack are different than the executable instructions used to generate the second BMC firmware stack.

Claims (39)

1. An information handling system (IHS), comprising:

a plurality of hardware devices; and

a baseboard management controller (BMC) in communication with the plurality of hardware devices, the BMC comprising one or more processors and one or more memory units including instructions that, upon execution by the processors, cause the BMC to:

begin execution of an openBMC firmware stack, wherein the openBMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS;

when the openBMC firmware stack is being executed, inhibit the openBMC firmware stack from performing at least one function of the BMC; during execution of the openBMC firmware stack, halt execution of the openBMC firmware stack, and begin execution of a vendor-based BMC firmware stack, wherein the vendor-based BMC firmware stack is provided by a vendor of the IHS in which the BMC is configured; and

when the vendor-based BMC firmware stack is being executed, allow the vendor-based BMC firmware stack to perform the at least one function of the BMC.

2. The IHS of claim 1 , wherein the instructions, upon execution, further cause the BMC to:

during the execution of the vendor-based BMC firmware stack, halt the execution of the vendor-based BMC firmware stack, and begin a second execution of the openBMC firmware stack.

3. The IHS of claim 1 , wherein the vendor-based BMC firmware stack is configured to perform one or more maintenance operations for the IHS.

4. The IHS of claim 1 , wherein the instructions, upon execution, further cause the BMC to inhibit the openBMC firmware stack from accessing the vendor-based BMC firmware stack stored in a portion of the memory units.

5. The IHS of claim 1 , wherein the instructions, upon execution, further cause the BMC to store information associated with the license in one or more one time programmable (OTP) bits in the baseboard processor.

6. The IHS of claim 1 , wherein the instructions comprise a bootloader that is executed to:

halt the execution of the openBMC firmware stack, and begin the execution of the vendor-based BMC firmware stack; and

enforce one or more access policies based on whether the openBMC firmware stack or vendor-based BMC firmware stack is currently being executed, the access policies indicating a level of access that the openBMC firmware stack has to a portion of memory units that stores the vendor-based BMC firmware stack.

7. The IHS of claim 1 , wherein the instructions comprise a hypervisor that is executed to:

halt the execution of the openBMC firmware stack, and begin the execution of the vendor-based BMC firmware stack; and

enforce one or more access policies based on whether the openBMC firmware stack or vendor-based BMC firmware stack is currently being executed, the access policies indicating a level of access that the openBMC firmware stack has to a portion of memory units that stores the vendor-based BMC firmware stack.

8. The IHS of claim 1 , wherein the instructions, upon execution, further cause the BMC to perform at least one of suspending the currently executed first or vendor-based BMC firmware stack, and hibernating the currently executed first or vendor-based BMC firmware stack.

9. A method comprising:

beginning, using instructions stored in at least one memory and executed by at least one processor, execution of an openBMC firmware stack on a baseboard management controller (BMC) in communication with a plurality of hardware devices of an information handling system (IHS), wherein the openBMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS; and

when the openBMC firmware stack is being executed, inhibiting the openBMC firmware stack from performing at least one function of the BMC;

during execution of the openBMC firmware stack, halting, using the instructions, execution of the openBMC firmware stack, and begin execution of a vendor-based BMC firmware stack, wherein at least a portion of the executable instructions used to generate openBMC firmware stack are different than the executable instructions used to generate the vendor-based BMC firmware stack; and

when the vendor-based BMC firmware stack is being executed, allowing the vendor-based BMC firmware stack to perform the at least one function of the BMC.

10. The method of claim 9 , further comprising:

during the execution of the vendor-based BMC firmware stack, halt the execution of the vendor-based BMC firmware stack, and begin a second execution of the openBMC firmware stack.

11. The method of claim 10 further comprising performing one or more maintenance operations for the IHS by the vendor-based BMC firmware stack.

12. The method of claim 11 , further comprising inhibiting the custom BMC firmware stack from accessing the vendor-based BMC firmware stack stored in a portion of the memory units.

13. The method of claim 9 , further comprising storing information associated with the license in one or more one time programmable (OTP) bits in the baseboard processor.

14. The method of claim 9 , further comprising:

halting, by a bootloader, the execution of the openBMC firmware stack, and begin the execution of the vendor-based BMC firmware stack; and

enforcing, by the bootloader, one or more access policies based on whether the openBMC firmware stack or vendor-based BMC firmware stack is currently being executed, the access policies indicating a level of access that the openBMC firmware stack has to a portion of memory units that stores the vendor-based BMC firmware stack.

15. An information handling system (IHS), comprising:

a plurality of hardware devices; and

a baseboard management controller (BMC) in communication with the plurality of hardware devices, the BMC comprising one or more processors and one or more memory units including instructions that, upon execution by the processors, cause the BMC to:

receive selection of an openBMC firmware stack, wherein the openBMC firmware stack has been implemented by an entity that is separate and distinct from a vendor of the IHS;

begin execution of the openBMC firmware stack;

when the openBMC firmware stack is being executed, inhibit the openBMC firmware stack from performing at least one function of the BMC;

during execution of the openBMC firmware stack, halt execution of the openBMC firmware stack, and begin execution of a vendor-based BMC firmware stack, wherein the vendor-based BMC firmware stack is provided by a vendor of the IHS in which the BMC is configured; and

when the vendor-based BMC firmware stack is being executed, allow the vendor-based BMC firmware stack to perform the at least one function of the BMC.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (058014/0560) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0473 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (057931/0392) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0382 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (057758/0286) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 061654/0064 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 058014/0560 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 057758/0286 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 057931/0392 →
SECURITY AGREEMENT Recorded Oct 1, 2021
From: DELL PRODUCTS, L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 057682/0830 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 14, 2021
From: MADDUKURI, AKKIAH CHOUDARY; MUGUNDA, CHANDRASEKHAR; GIRI, PRASHANTH; CHO, EUGENE DAVID; GERHART, DONALD W.; KULKARNI, YOGESH PRABHAKAR
To: DELL PRODUCTS, L.P.
Reel/Frame 056535/0237 →
Continuity (1)
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