IP Library › Granted Patent US 12,373,674
Granted Patent B2
US 12,373,674 · App. 17/347,374 · Granted Jul 29, 2025

Coding of an event in an analog data flow with a first event detection spike and a second delayed spike

Inventors: Valerian Cincon (Villard Bonnot, FR); Philippe Galy (Le Touvet, FR)
Assignee: STMicroelectronics France
G06N3/049G06N3/065G06N3/08G06N20/10G06V20/40G10L15/16
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Quick Facts
Patent No.
US 12,373,674
App. No.
17/347,374
Granted
Jul 29, 2025
Kind
B2
Abstract

A method includes generating, by a first spiking neuron, an event detection signal indicating a time of detection of an event in a data flow. The event detection signal is transmitted from the first spiking neuron to a second spiking neuron. The second spiking neuron generates a spike delayed, with respect to the time of detection of the event, according to an amplitude of the event. The delayed spike is included in a coded signal.

Claims (54)

1. A method comprising:

low-pass filtering an analog data flow;

generating, by a first spiking neuron circuit, a first spike indicating a time of detection of an event in the filtered analog data flow;

in response to the generating of the first spike,

activating a sample and hold circuit to hold a value of the event in the filtered analog data flow; and

activating a second spiking neuron circuit coupled to the sample and hold circuit

to generate a spike delayed with respect to the time of detection of the event according to an amplitude of the event by integrating the value of the filtered analog data flow held by the sample and hold circuit, wherein the integrating is non-linear and the delay is an exponential function of the value of the filtered analog data flow held by the sample and hold circuit; and

including the first spike and the delayed spike in a coded signal.

2. The method according to claim 1 , wherein the filtering of the analog data flow filters events based on a first duration threshold.

3. The method according to claim 2 , wherein events with a duration equal to or below the first duration threshold are filtered from the analog data flow.

4. The method according to claim 1 , wherein the filtering of

the analog data flow filters events based on a duration range.

5. The method according to claim 4 , wherein events outside the duration range are filtered from the analog data flow.

6. The method according to claim 1 , wherein the analog data flow corresponds to an analog audio signal, or an analog video signal.

7. A device comprising:

a filter, which, in operation, low-pass filters an analog data flow; and coding circuitry coupled to the filter, the coding circuitry including:

a first spiking neuron circuit, which, in operation, generates an event detection signal indicating a time of detection of an event in the filtered analog data flow;

a sample and hold circuit, which, in operation, responds to the event detection signal by storing an amplitude of the event in the analog data flow; and

a second spiking neuron circuit coupled to the first spiking neuron circuit and to the sample and hold circuit, wherein the second spiking neuron circuit, in operation, responds to the event detection signal by generating a spike delayed with respect to the time of detection of the event according to an amplitude of the event stored by the sample and hold circuit, wherein,

the second spiking neuron circuit, in operation, generates the delayed spike by applying non-linear integration and the delay is an exponential function of the amplitude of the event stored by the sample and hold circuit, and

the event detection signal is an event spike and the coding circuitry includes the event spike and the delayed spike in a coded signal.

8. The device according to claim 7 , wherein the filter filters events based on one or more duration thresholds.

9. The device according to claim 8 , wherein the one or more

duration thresholds define a threshold range.

10. The device according to claim 7 , wherein the analog data flow corresponds to an analog audio signal or an analog video signal.

11. The device of claim 7 , wherein the delay increases as the value of the filtered analog data flow held by the sample and hold circuit increases.

12. The device according to claim 11 , wherein the non-linear integrating is a function of a relationship between a trigger threshold of the second spiking neuron circuit and an amplitude of the event stored by the sample and hold circuit.

13. A system, comprising: an encoder including:

a filter, which, in operation, low-pass filters an analog data flow;

a first spiking neuron circuit, which, in operation, generates an event spike indicating a time of detection of an event in the filtered analog data flow;

a sample and hold circuit coupled to the first spiking neuron circuit, wherein the sample and hold circuit, in operation, responds to the event spike of the first neuron spiking circuit by storing a value of the filtered analog data flow; and

a second spiking neuron circuit coupled to the first spiking neuron circuit and to the sample and hold circuit, wherein the second spiking neuron circuit, in operation, responds to

the event spike by generating a spike delayed with respect to the time of detection of the event according to an amplitude of the event, wherein,

the second spiking neuron circuit, in operation, generates the delayed spike by applying non-linear integration to the value stored by the sample and hold circuit, and the delay is an exponential function of the value stored by the sample and hold circuit, and

the encoder, in operation, generates a coded signal including the event spike indicating detection of the event and the delayed spike; and

a neural network coupled to the encoder, wherein the neural network, in operation, processes coded signals generated by the encoder.

14. The system of claim 13 , wherein the encoder comprises a plurality of pairs of first and second spiking neuron circuits, wherein the encoder, in operation, synchronizes spikes generated by the first spiking neurons of the plurality of pairs of first and second spiking neuron circuits.

15. The system of claim 14 , wherein the synchronizing includes responding to a firing of a first spiking neuron circuit of one of the plurality of pairs of first and second spiking neuron circuits by adjusting a turn-on threshold of a first spiking neuron circuit of another pair of the plurality of pairs of first and second spiking neuron circuits.

16. A non-transitory computer-readable medium having contents which cause processing circuitry to perform a method, the method comprising:

low-pass filtering an analog data flow;

generating, by a first spiking neuron circuit of the processing circuitry, a first spike indicating a time of detection of an event in the filtered analog data flow;

in response to the generation of the first spike,

activating a sample and hold circuit of the processing circuitry to hold a value of the filtered analog data flow; and

activating a second spiking neuron circuit of the processing circuitry to generate a spike delayed with respect to the time of detection of the event according to an amplitude of the event by integrating the value of the filtered analog data flow held by the sample and hold circuit, wherein the integrating is non-linear and the delay is an exponential function of the

value of the filtered analog data flow held by the sample and hold circuit; and

generating a coded signal including the first spike and the delayed spike.

17. The non-transitory computer-readable medium of claim 16 , wherein the contents comprise instructions executable by the processing circuitry.

18. The method of claim 1 , wherein the delay is related to the value of the value of the filtered analog data flow held by the sample and hold circuit according to:

y=a×e b×(x+k) +c×e d×(x+h) +f

where y represents the delay, x represents the value of the filtered analog data flow held by the sample and hold circuit, and a, b, c, d, f, h, and k are constants.

19. The method of claim 1 , wherein the delay increases as the value of the filtered analog data flow held by the sample and hold circuit increases.

20. The device of claim 7 , wherein the delay is related to the amplitude of the event stored by the sample and hold circuit according to:

y=a×e b×(x+k) +c×e d×(x+h) +f

where y represents the delay, x represents the amplitude of the event stored by the sample and hold circuit, and a, b, c, d, f, h, and k are constants.

Assignments (2)
CHANGE OF NAME Recorded Jan 10, 2024
From: STMICROELECTRONICS SA
To: STMICROELECTRONICS FRANCE
Reel/Frame 066254/0070 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2021
From: CINCON, VALERIAN; GALY, PHILIPPE
To: STMICROELECTRONICS SA
Reel/Frame 056702/0043 →
Priority Claims (1)
FR 2006279 · Jun 16, 2020 · national
Continuity (1)
Related Publication 20210390374A1 · Dec 16, 2021
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