Platform framework standby operation
Embodiments of systems and methods for standby operation in a platform framework are described. In some embodiments, an Information Handling System (IHS) may include a processor and a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to: identify an application registered with a platform framework via an Application Programming Interface (API); and at least one of: in response to the identification matching any entry in a whitelist, put the application in a throttled state during standby operation of the IHS; or in response to the identification not matching any entry in the whitelist, put the application in a suspended state during standby operation of the IHS.
1. An Information Handling System (IHS), comprising:
a processor; and
a memory coupled to the processor, the memory having program instructions stored thereon that, upon execution, cause the IHS to:
identify an application registered with a platform framework via an Application Programming Interface (API), wherein the platform framework is supported by an Operating System (OS); and
at least one of:
in response to the identification matching any entry in a whitelist, put the application in a throttled state during standby operation of the IHS, wherein in the throttled state the application is allowed by the OS to execute with reduced activity; or
in response to the identification not matching any entry in the whitelist, put the application in a suspended state during standby operation of the IHS, wherein in the suspended state the application is not allowed by the OS to execute.
2. The IHS of claim 1 , wherein the standby operation comprises a Modern or Connected Standby operation.
3. The IHS of claim 1 , wherein one or more entries in the whitelist are selected based upon at least one of: a power mode, a battery metric, calendar information, an IHS posture, an IHS location, a user proximity, or a user presence.
4. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to:
block a notification if another application registered with the platform framework is of a selected type to prevent the other application from being suspended during standby operation of the IHS; and
in response to a determination using a process manifest and an import address table that the other application is standby-aware, put the other application in the throttled state during standby operation of the IHS.
5. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to receive an indication that the IHS is entering the standby operation.
6. The IHS of claim 1 , wherein the indication is provided by a chipset coupled to the processor.
7. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to, in response to the indication, distribute at least a binary portion of the platform framework to an Embedded Controller (EC) coupled to the processor.
8. The IHS of claim 1 , wherein the program instructions, upon execution, further cause the IHS to, in response to the indication, distribute at least a binary portion of the platform framework to a selected one or more of a plurality of System-on-Chip (SoC) cores coupled to the processor.
9. The IHS of claim 8 , wherein the one or more SoC cores is selected based upon at least one of: a power mode, a battery metric, calendar information, an IHS posture, an IHS location, a user proximity, or a user presence.
10. A memory storage device having program instructions stored thereon that, upon execution by an Information Handling System (IHS), cause the IHS to:
register an application with a platform framework;
select, based at least in part upon the registration, whether to put the application in a throttled or a suspended state during a standby operation;
receive an indication of the standby operation; and
in response to the indication, put the application in the selected state and distribute at least a binary portion of the platform framework to an Embedded Controller (EC).
11. The memory storage device of claim 10 , wherein the program instructions, upon execution, further cause the IHS to, in response to the indication, distribute at least a binary portion of the platform framework to a selected one or more of a plurality of System-on-Chip (SoC) cores coupled to a processor.
12. The memory storage device of claim 11 , wherein the one or more SoC cores is selected based upon at least one of: a power mode, a battery metric, calendar information, an IHS posture, an IHS location, a user proximity, or a user presence.
13. A method, comprising:
registering an application with a platform framework;
selecting, based at least in part upon the registration, whether to put the application in a throttled or a suspended state during a standby operation;
receiving an indication of the standby operation; and
in response to the indication, putting the application in the selected state and distributing at least a binary portion of the platform framework to a selected one or more of a plurality of System-on-Chip (SoC) cores.
14. The method of claim 13 , wherein the one or more SoC cores are selected based upon at least one of: a power mode, a battery metric, calendar information, an IHS posture, an IHS location, a user proximity, or a user presence.