SYSTEMS AND METHODS FOR USING PATTERN-BASED BIT FLIPS FOR FASTER WRITE AND CONSISTENT ERROR RECOVERY
An information handling system may include a processor and a non-transitory computer-readable medium having stored thereon a program of instructions executable by the processor, the program of instructions configured to, when read and executed by the processor, receive a write request to a non-volatile memory, combine write request data and data patterns associated with the write request into a versioned log and store the versioned log in a persistent memory, and store in the persistent memory patterned-matched bits for single- and multi-bit error recovery code-based recovery.
1 . An information handling system comprising:
a processor; and
a non-transitory computer-readable medium having stored thereon a program of instructions executable by the processor, the program of instructions configured to, when read and executed by the processor:
respond to receiving a write request to a non-volatile memory by writing information to a hybrid buffer comprising a random access memory portion and a non-volatile portion before writing information to the non-volatile memory;
combine write request data and data patterns associated with the write request into a versioned log and store the versioned log in a persistent memory; and
store in the persistent memory patterned-matched bits for single- and multi-bit error recovery code-based recovery,
optimize every write operation to NVRAM with combined logging in a hybrid buffer 202 (e.g., a cache implemented in both random access memory and non-volatile memory)
2 . The information handling system of claim 1 , wherein the non-volatile memory is a non-volatile random access memory for storing firmware of the information handling system.
3 . The information handling system of claim 2 , wherein the non-volatile random access memory is implemented with NAND flash.
4 . The information handling system of claim 1 , the instructions further configured to, in response to corruption of data on the non-volatile memory, recover such data based on the patterned-matched bits.
5 . The information handling system of claim 1 , the instructions further configured to, in response to corruption of data on the non-volatile memory, and based on the versioned log, recover a previous firmware version for booting to an operating system of the information handling system.
6 . A method comprising:
respond to receiving a write request to a non-volatile memory of an information handling system by writing information to a hybrid buffer comprising a random access memory portion and a non-volatile portion before writing information to the non-volatile memory;
combining write request data and data patterns associated with the write request into a versioned log and storing the versioned log in a persistent memory; and
storing in the persistent memory patterned-matched bits for single- and multi-bit error recovery code-based recovery.
7 . The method of claim 6 , wherein the non-volatile memory is a non-volatile random access memory for storing firmware of the information handling system.
8 . The method of claim 7 , wherein the non-volatile random access memory is implemented with NAND flash.
9 . The method of claim 6 , further comprising, in response to corruption of data on the non-volatile memory, recovering such data based on the patterned-matched bits.
10 . The method of claim 6 , further comprising, in response to corruption of data on the non-volatile memory, and based on the versioned log, recovering a previous firmware version for booting to an operating system of the information handling system.
11 . An article of manufacture comprising:
a non-transitory computer-readable medium; and
computer-executable instructions carried on the computer readable medium, the instructions readable by a processor, the instructions, when read and executed, for causing the processor to:
respond to receiving a write request to a non-volatile memory of an information handling system by writing information to a hybrid buffer comprising a random access memory portion and a non-volatile portion before writing information to the non-volatile memory;
combine write request data and data patterns associated with the write request into a versioned log and store the versioned log in a persistent memory; and
store in the persistent memory patterned-matched bits for single- and multi-bit error recovery code-based recovery.
12 . The article of claim 11 , wherein the non-volatile memory is a non-volatile random access memory for storing firmware of the information handling system.
13 . The article of claim 12 , wherein the non-volatile random access memory is implemented with NAND flash.
14 . The article of claim 11 , the instructions for further causing the processor to, in response to corruption of data on the non-volatile memory, recover such data based on the patterned-matched bits.
15 . The article of claim 11 , the instructions for further causing the processor to, in response to corruption of data on the non-volatile memory, and based on the versioned log, recover a previous firmware version for booting to an operating system of the information handling system.