IP Library Granted Patent US 12,164,150
Granted Patent B2
US 12,164,150 · App. 17/373,576 · Granted Dec 10, 2024

Optical waveguide passivation for moisture protection

Inventors: Li Chen (Maynard, MA); Long Chen (Maynard, MA); Christopher Doerr (Maynard, MA)
Assignee: CISCO TECHNOLOGY, INC.
G02B6/132G02B6/122G02B6/136
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Quick Facts
Patent No.
US 12,164,150
App. No.
17/373,576
Granted
Dec 10, 2024
Kind
B2
Abstract

In part, in one aspect, the disclosure relates to a method for passivating a waveguide of an optical circuit. The method includes etching a suspended waveguide in the optical circuit; the suspended waveguide having a top surface, a bottom surface, and side surfaces; and covering the top surface and side surfaces of the suspended waveguide with a passivation coating having a thickness that ranges from between about 10 nm to about 20 nm. In one embodiment, the method further includes removing one or more coatings from a portion of the optical circuit. The disclosure also relates to various passivated optical silicon circuit embodiments.

Claims (31)

1. A method for passivating a waveguide of an optical circuit comprising:

etching a suspended waveguide in the optical circuit; the suspended waveguide having a top surface, a bottom surface, and side surfaces, the suspended waveguide suspended by a plurality of support beams, wherein the suspended waveguide comprises a first layer comprising silicon and a second layer comprising silicon; and

covering the top surface and side surfaces of the suspended waveguide with a moisture resistant passivation coating having a thickness that ranges from between about 10 nm to about 20 nm.

2. The method of claim 1 further comprising removing one or more coatings from a portion of the optical circuit.

3. The method of claim 2 , wherein the passivation coating is Si 3 N 4 .

4. The method of claim 3 wherein covering the top surface and side surfaces of the suspended waveguide with a moisture resistant passivation coating comprises applying a Si 3 N 4 coating and removing a portion of the Si 3 N 4 coating until the Si 3 N 4 coating has a thickness that ranges from between about 10 nm to about 20 nm.

5. The method of claim 1 wherein the optical circuit comprises a stack of a plurality of layers, wherein one of the layers is silicon substrate having a top surface and a bottom surface.

6. The method of claim 5 further comprising removing a portion of the top surface of the silicon substrate to define a cavity below the suspended waveguide, wherein the suspended waveguide comprises SiO 2 .

7. The method of claim 5 further comprising removing a portion of the bottom surface of the silicon substrate to define a cavity.

8. The method of claim 5 further comprising forming a metal heater relative to one or more layers of the suspended waveguide.

9. The method of claim 5 wherein the passivation coating is a metal oxide, a metal nitride, or a silicon oxynitride.

10. An optical silicon circuit comprising:

a substrate comprising silicon;

one or more regions of optical waveguide material disposed on the substrate; and

one or more regions of a moisture resistant passivation coating disposed on a top surface and a side surface of the one or more regions of optical waveguide material, wherein thickness of passivation coating ranges from about 10 nm to about 20 nm, wherein the optical waveguide material defines a suspended waveguide, wherein optical waveguide material is etched to define one or more cavities; and

a plurality of support beams, wherein one or more support beams support one side of the suspended waveguide, wherein one or more support beams support the other side of the suspended waveguide.

11. The optical silicon circuit of claim 10 wherein the passivation coating comprises a silicon nitride, a metal oxide, a metal nitride, or a silicon oxynitride.

12. The optical silicon circuit of claim 10 wherein optical waveguide material is etched to define the suspended waveguide.

13. The optical silicon circuit of claim 10 further comprising one or more silicon nitride waveguides disposed in the optical waveguide material.

14. The optical silicon circuit of claim 10 wherein the substrate is silicon-on-insulator wafer having a top surface and a bottom surface.

15. The optical silicon circuit of claim 14 wherein a portion of either the top surface or the bottom surface of the silicon-on-insulator wafer has been removed to define one or more cavities.

16. A method for passivating a waveguide of an optical circuit comprising:

etching a suspended waveguide in an optical circuit; the suspended waveguide having a top, bottom and sides;

covering the top and sides of the suspended waveguide with a moisture resistant passivation coating of a thickness between about 10 nm to about 20 nm; and

removing a portion of the moisture resistant passivation coating, wherein the moisture resistant passivation coating comprises a silicon nitride, wherein the suspended waveguide comprises one or more silicon nitride waveguides disposed in the optical waveguide material.

17. The method of claim 16 wherein the passivation coating comprises Si 3 N 4 .

18. A method for passivating a waveguide of an optical circuit comprising:

etching a suspended waveguide in the optical circuit, the suspended waveguide having a top surface, a bottom surface, and side surfaces, the suspended waveguide suspended by a plurality of support beams;

covering the top surface and side surfaces of the suspended waveguide with a moisture resistant passivation coating; and

removing a portion of the moisture resistant passivation coating until the moisture resistant passivation has a thickness that ranges from between about 10 nm to about 20 nm, wherein the moisture resistant passivation coating is a silicon nitride.

19. The method of claim 18 , wherein the moisture resistant passivation coating is Si 3 N 4 .

Assignments (4)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2024
From: CHEN, LI
To: CISCO TECHNOLOGY, INC.
Reel/Frame 069007/0831 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2024
From: CHEN, LONG
To: CISCO TECHNOLOGY, INC.
Reel/Frame 069008/0150 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 24, 2024
From: DOERR, CHRISTOPHER
To: CISCO TECHNOLOGY, INC.
Reel/Frame 069008/0500 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 19, 2024
From: ACACIA COMMUNICATIONS, INC.
To: ACACIA TECHNOLOGY, INC.
Reel/Frame 066832/0659 →
Continuity (2)
Provisional Application 63050440 · Jul 10, 2020
Related Publication 20220011507A1 · Jan 13, 2022