System and method for processing requests in a multithreaded system
A method, computer program product, and computing system for associating a plurality of NVMe IO submission queues with an NVMe IO completion queue. An NVMe IO completion queue polling frequency may be defined for a plurality of threads configured to provide one or more IO requests to the plurality of NVMe IO submission queues. The NVMe IO completion queue may be polled based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads.
1. A computer-implemented method comprising:
associating a plurality of NVMe IO submission queues with an NVMe IO completion queue, wherein each NVMe IO submission queue of the plurality of NVMe IO submission queues is associated with a specific unique thread of a plurality of threads;
defining an NVMe IO completion queue polling frequency for the plurality of threads configured to provide one or more IO requests to the plurality of NVMe IO submission queues; and
polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads.
2. The computer-implemented method of claim 1 , further comprising: providing, via the plurality of threads, the one or more IO requests to an NVMe IO submission queue associated with a specific thread of the plurality of threads.
3. The computer-implemented method of claim 2 , further comprising
processing the one or more IO requests from the plurality of NVMe IO submission queues on one or more NVMe storage devices.
4. The computer-implemented method of claim 3 , further comprising:
in response to processing the one or more IO requests from the plurality of NVMe IO submission queues on the one or more NVMe storage devices, providing an NVMe IO completion entry for each IO request to the NVMe IO completion queue, thus defining one or more NVMe IO completion entries.
5. The computer-implemented method of claim 4 , wherein polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads includes:
processing, via the plurality of threads, the one or more NVMe IO completion entries from the NVMe IO completion queue.
6. The computer-implemented method of claim 1 , wherein polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads includes:
determining, via a first thread, whether the NVMe IO completion queue is being held by a second thread; and
in response to determining that the NVMe IO completion queue is being held by the second thread, forgoing the polling of the NVMe IO completion queue by the first thread.
7. A computer program product residing on a non-transitory computer readable medium having a plurality of instructions stored thereon which, when executed by a processor, cause the processor to perform operations comprising:
associating a plurality of NVMe IO submission queues with an NVMe IO completion queue, wherein each NVMe IO submission queue of the plurality of NVMe IO submission queues is associated with a specific unique thread of a plurality of threads;
defining an NVMe IO completion queue polling frequency for a plurality of threads configured to provide one or more IO requests to the plurality of NVMe IO submission queues; and
polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads.
8. The computer program product of claim 7 , wherein the operations further comprise: providing, via the plurality of threads, the one or more IO requests to an NVMe IO submission queue associated with a specific thread of the plurality of threads.
9. The computer program product of claim 8 , wherein the operations further comprise:
processing the one or more IO requests from the plurality of NVMe IO submission queues on one or more NVMe storage devices.
10. The computer program product of claim 9 , wherein the operations further comprise:
in response to processing the one or more IO requests from the plurality of NVMe IO submission queues on the one or more NVMe storage devices, providing an NVMe IO completion entry for each IO request to the NVMe IO completion queue, thus defining one or more NVMe IO completion entries.
11. The computer program product of claim 10 , wherein polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads includes:
processing, via the plurality of threads, the one or more NVMe IO completion entries from the NVMe IO completion queue.
12. The computer program product of claim 7 , wherein polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads includes:
determining, via a first thread, whether the NVMe IO completion queue is being held by a second thread; and
in response to determining that the NVMe IO completion queue is being held by the second thread, forgoing the polling of the NVMe IO completion queue by the first thread.
13. A computing system comprising:
a memory; and
a processor configured to associate a plurality of NVMe IO submission queues with an NVMe IO completion queue, wherein each NVMe IO submission queue of the plurality of NVMe IO submission queues is associated with a specific unique thread of a plurality of threads, wherein the processor is further configured to define an NVMe IO completion queue polling frequency for a plurality of threads configured to provide one or more IO requests to the plurality of NVMe IO submission queues, and wherein the processor is further configured to poll, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads.
14. The computing system of claim 13 , wherein the processor is further configured to: provide, via the plurality of threads, the one or more IO requests to an NVMe IO submission queue associated with a specific thread of the plurality of threads.
15. The computing system of claim 14 , wherein the processor is further configured to:
process the one or more IO requests from the plurality of NVMe IO submission queues on one or more NVMe storage devices.
16. The computing system of claim 15 , wherein the processor is further configured to:
in response to processing the one or more IO requests from the plurality of NVMe IO submission queues on the one or more NVMe storage devices, provide an NVMe IO completion entry for each IO request to the NVMe IO completion queue, thus defining one or more NVMe IO completion entries.
17. The computing system of claim 16 , wherein polling, via the plurality of threads, the NVMe IO completion queue based upon, at least in part, the NVMe IO completion queue polling frequency defined for the plurality of threads includes:
processing, via the plurality of threads, the one or more NVMe IO completion entries from the NVMe IO completion queue.