IP Library Granted Patent US 11,907,119
Granted Patent B2
US 11,907,119 · App. 17/375,872 · Granted Feb 20, 2024

Array access with receiver masking

Inventors: Natalija Jovanovic (Munich, DE); Andrea Sorrentino (Munich, DE); Marcos Alvarez Gonzalez (Munich, DE)
Assignee: Micron Technology, Inc.
G06F12/0623G06F12/02G06F2212/251
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Quick Facts
Patent No.
US 11,907,119
App. No.
17/375,872
Granted
Feb 20, 2024
Kind
B2
Abstract

Methods, systems, and devices for array access with receiver masking are described. A first device may issue to a second device a first sequence of write commands for a set of data. The first sequence of write commands may indicate different memory addresses in an order. After issuing the first sequence of write commands, the first device may issue to the second device a second sequence of read commands for the set of data. The second sequence of read commands may indicate the different memory addresses in the same order as the first sequence of write commands. Based on issuing the second sequence of read commands, the first device may receive the set of data from the second device.

Claims (73)

1. A method at a first device, comprising:

issuing, to a second device, a first sequence of write commands for writing a set of data by the second device, the first sequence of write commands indicating different memory addresses in an order;

issuing, to the second device after issuing the first sequence of write commands, a second sequence of read commands for reading the set of data by the second device to the first device, the second sequence of read commands indicating the different memory addresses in the same order as the first sequence of write commands; and

receiving, from the second device, the set of data based at least in part on issuing the second sequence of read commands.

2. The method of claim 1 , wherein each of the write commands in the first sequence of write commands indicate a respective unique address.

3. The method of claim 1 , further comprising:

determining that a timing condition associated with the first sequence of write commands is satisfied, wherein the first sequence of write commands is determined based at least in part on the timing condition being satisfied.

4. The method of claim 3 , wherein determining that the timing condition is satisfied comprises:

determining that a first write command of the first sequence of write commands is separated from a preceding write command by at least a threshold duration; and

determining that a last write command of the first sequence of write commands is separated from a subsequent write command by at least the threshold duration.

5. The method of claim 4 , wherein the write commands of the first sequence are separated from each other by less than the threshold duration.

6. The method of claim 4 , wherein read commands of the second sequence of read commands are separated from each other by less than the threshold duration and the second sequence of read commands is separated from one or more other sequences of read commands by at least the threshold duration.

7. The method of claim 1 , further comprising:

issuing, to the second device, a command indicating a receiver masking mode that disables a subset of sub-receivers in a receiver of the second device, wherein the first sequence of write commands is issued to the second device based at least in part on issuing the command indicating the receiver masking mode.

8. The method of claim 7 , further comprising:

performing maximum transition avoidance (MTA) encoding on the set of data; and

sending the set of data to the second device based at least in part on performing MTA encoding.

9. The method of claim 8 , further comprising:

performing MTA decoding on the received set of data based at least in part on sending the set of data to the second device.

10. The method of claim 1 , wherein:

a first quantity of non-functional commands is issued between a first write command of the first sequence of write commands and a second write command of the first sequence of write commands, and

a second quantity of non-functional commands different than the first quantity is issued between a first read command of the second sequence of read commands and a second read command of the second sequence of read commands.

11. A method at a first device, comprising:

receiving, from a second device, a first sequence of write commands for writing a set of data by the first device, the first sequence of write commands indicating different memory addresses of a memory array in an order;

receiving, from the second device, a second sequence of read commands for reading the set of data by the first device to the second device, the second sequence of read commands indicating the different memory addresses in the same order as the first sequence of write commands; and

sending, to the second device, the set of data based at least in part on receiving the second sequence of read commands.

12. The method of claim 11 , wherein none of the write commands in the first sequence of write commands indicate a same address.

13. The method of claim 11 , further comprising:

writing the set of data to the different memory addresses of the memory array based at least in part on the first sequence of write commands; and

reading the set of data from the different memory addresses of the memory array based at least in part on the second sequence of read commands.

14. The method of claim 13 , further comprising:

performing maximum transition avoidance (MTA) decoding on the set of data before writing the set of data to memory; and

performing MTA encoding on the set of data before sending the set of data to the second device.

15. The method of claim 14 , further comprising:

enabling a receiver masking mode at the first device, wherein the receiver masking mode disables a subset of sub-receivers in a receiver of the first device.

16. The method of claim 15 , further comprising:

receiving a command indicating the receiver masking mode, wherein the receiver masking mode is enabled based at least in part on the command.

17. The method of claim 11 , wherein the first sequence of write commands is separated from another sequence of write commands by at least a threshold duration, and the write commands of the first sequence of write commands are separated from each other by less than the threshold duration.

18. The method of claim 11 , wherein the second sequence of read commands is separated from another sequence of read commands by at least a threshold duration, and the read commands of the second sequence of read commands are separated from each other by less than the threshold duration.

19. A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of a first device, cause the first device to:

issue to a second device a first sequence of write commands for writing a set of data stored at a set of memory addresses by the second device, the first sequence of write commands indicating different memory addresses, of the set of memory addresses, in an order;

issue, to the second device after issuing the first sequence of write commands, a second sequence of read commands for reading the set of data by the second device to the first device, the second sequence of read commands indicating the different memory addresses in the same order as the first sequence of write commands; and

receive, from the second device, the set of data based at least in part on issuing the second sequence of read commands.

20. The non-transitory computer-readable medium of claim 19 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

determine that a first write command of the first sequence of write commands is separated from a preceding write command by at least a threshold duration, wherein the first sequence of write commands is determined based at least in part on the first write command being separated from the preceding write command by at least the threshold duration; and

determine that a last write command of the first sequence of write commands is separated from a subsequent write command by at least the threshold duration, wherein the first sequence of write commands is determined based at least in part on the last write command being separated from the subsequent write command by at least the threshold duration.

21. The non-transitory computer-readable medium of claim 19 , wherein the write commands of the first sequence are separated from each other by less than a threshold duration.

22. The non-transitory computer-readable medium of claim 19 , wherein read commands of the second sequence of read commands are separated from each other by less than a threshold duration and the second sequence of read commands is separated from one or more other sequences of read commands by at least the threshold duration.

23. The non-transitory computer-readable medium of claim 19 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

issue to the second device a command indicating a receiver masking mode that disables a subset of sub-receivers in a receiver of the second device, wherein the first sequence of write commands is issued to the second device based at least in part on issuing the command indicating the receiver masking mode.

24. The non-transitory computer-readable medium of claim 19 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

perform maximum transition avoidance (MTA) encoding on the set of data;

send the set of data to the second device based at least in part on performing MTA encoding; and

perform MTA decoding on the received set of data.

25. A non-transitory computer-readable medium storing code comprising instructions which, when executed by a processor of a first device, cause the first device to:

receive from a second device a first sequence of write commands for writing a set of data stored at a set of memory addresses by the first device, the first sequence of write commands indicating different memory addresses, of the set of memory addresses, in an order;

receive from the second device a second sequence of read commands for reading the set of data by the first device to the second device, the second sequence of read commands indicating the different memory addresses of the set of memory addresses in the same order as the first sequence of write commands; and

send, to the second device, the set of data based at least in part on receiving the second sequence of read commands.

26. The non-transitory computer-readable medium of claim 25 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

write the set of data to the different memory addresses of a memory array based at least in part on the first sequence of write commands; and

read the set of data from the memory array based at least in part on the second sequence of read commands.

27. The non-transitory computer-readable medium of claim 26 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

enable a receiver masking mode at the first device, wherein the receiver masking mode disables a subset of sub-receivers in a receiver of the first device.

28. The non-transitory computer-readable medium of claim 27 , wherein the instructions, when executed by the processor of the first device, cause the first device to:

perform maximum transition avoidance (MTA) decoding on the set of data before writing the set of data to memory; and

perform MTA encoding on the set of data before sending the set of data to the second device.

29. The non-transitory computer-readable medium of claim 25 , wherein the first sequence of write commands is separated from another sequence of write commands by at least a threshold duration, and wherein the write commands of the first sequence of write commands are separated from each other by less than the threshold duration.

30. A method, comprising:

issuing, by a first device to a second device, a first sequence of write commands for writing a set of data by the second device, the first sequence of write commands indicating a set of unique memory addresses in an order;

writing, by the second device, the set of data to the set of unique memory addresses in a memory array based at least in part on the first sequence of write commands;

issuing, by the first device to the second device based at least in part on issuing the first sequence of write commands, a second sequence of read commands for reading the set of data by the second device to the first device, the second sequence of read commands indicating the set of unique memory addresses in the same order as the first sequence of write commands;

reading, by the second device, the set of data from the set of unique memory addresses in the memory array based at least in part on the second sequence of read commands; and

sending the set of data from the second device to the first device based at least in part on the second sequence of read commands.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 29, 2023
From: JOVANOVIC, NATALIJA; SORRENTINO, ANDREA; ALVAREZ GONZALEZ, MARCOS
To: MICRON TECHNOLOGY, INC.
Reel/Frame 065378/0969 →
Continuity (1)
Related Publication 20230019093A1 · Jan 19, 2023