Compact routing package for high frequency isolation
Systems, methods, and devices for a ball grid array with non-linear conductive routing are described herein. Such a ball grid array may include a plurality of solder balls that are electrically coupled by a non-linear conductive routing. The non-linear conductive routing may include a plurality of routing sections where each of the plurality of routing sections is disposed at an angle to adjacent routing sections.
1. A system comprising:
a printed circuit board; and
a microprocessor, comprising a ball grid array and a substrate, coupled on the printed circuit board, and wherein:
the ball grid array comprises;
a first solder ball;
a second solder ball included in the same ball grid array and disposed on a same surface of the substrate as the first solder ball and adjacent to the first solder ball within the ball grid array; and
the substrate comprises a non-linear conductive routing, electrically coupling the first solder ball and the second solder ball, the non-linear conductive routing comprising, at least:
a first routing section, connected to the first solder ball;
a second routing section connected to the second solder ball and non-linearly coupled to the first routing section, wherein the first solder ball and the second solder ball are separated by at least a portion of a first area, and wherein the non-linear conductive routing is non-linearly disposed within the first area, wherein a length and one or more angles associated with the first routing section and the second routing section are determined based on a size of an area separating adjacent balls within the ball grid array.
2. The system of claim 1 , further comprising:
a memory communicatively coupled to the microprocessor.
3. The system of claim 1 , wherein the non-linear conductive routing further comprises:
a third routing section connected to the first routing section and disposed at a first angle to the first routing section;
a fourth routing section connected to the third routing section and disposed at a second angle to the third routing section; and
a fifth routing section connected to the fourth routing section, coupled to the second routing section, and disposed at a third angle to the fourth routing section.
4. The system of claim 1 , wherein the microprocessor is a field-programmable gate array.
5. The system of claim 1 , further comprising:
a power supply; and
a power management circuitry.
6. A ball grid array comprising:
a first solder ball;
a second solder ball included in a same ball grid array and disposed on a same surface of a substrate as the first solder ball and adjacent to the first solder ball within the ball grid array; and
a non-linear conductive routing electrically coupling the first solder ball and the second solder ball and comprising, at least:
a first routing section connected to the first solder ball; and
a second routing section connected to the second solder ball and non-linearly coupled to the first routing section, wherein the first solder ball and the second solder ball are separated by at least a portion of a first area, wherein the non-linear conductive routing is non-linearly disposed within the first area, and wherein a length and one or more angles associated with the first routing section and the second routing section are determined based on a size of an area separating adjacent balls within the ball grid array.
7. The ball grid array of claim 6 , wherein the non-linear conductive routing comprises at least four changes of routing direction.
8. The ball grid array of claim 6 , wherein the non-linear conductive routing further comprises:
a third routing section connected to the first routing section and disposed at a first angle to the first routing section;
a fourth routing section connected to the third routing section and disposed at a second angle to the third routing section; and
a fifth routing section connected to the fourth routing section, coupled to the second routing section, and disposed at a third angle to the fourth routing section.
9. The ball grid array of claim 6 , wherein the non-linear conductive routing is a portion of the substrate.
10. The ball grid array of claim 9 , wherein the substrate comprises a first layer and a second layer, and wherein the substrate is a portion of a microprocessor.
11. The ball grid array of claim 10 , wherein all of the non-linear conductive routing is disposed within the first layer.
12. The ball grid array of claim 6 , wherein the first solder ball and the second solder ball are separated by a first linear distance, and wherein the non-linear conductive routing comprises a second distance greater than the first linear distance.