IP Library Granted Patent US 11,620,058
Granted Patent B2
US 11,620,058 · App. 17/387,092 · Granted Apr 4, 2023

Temperature-adjusted power-on data retention time tracking for solid state drives

Inventors: Frederick K. H. Lee (Round Rock, TX); Girish B. Desai (Round Rock, TX); Samuel Hudson (Round Rock, TX); Robert J. Proulx (Round Rock, TX); Michael Rijo (Round Rock, TX); Leland W. Thompson (Round Rock, TX)
Assignee: Dell Products L.P.
G06F3/0619G06F3/064G06F3/0634G06F3/0652G06F3/0659G06F3/0679
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Quick Facts
Patent No.
US 11,620,058
App. No.
17/387,092
Granted
Apr 4, 2023
Kind
B2
Abstract

In general, embodiments of the invention relate tracking the operating temperature of the solid-state memory modules (SSMMs) in order to improve their performance.

Claims (66)

1. A method for managing a solid state memory module, the method comprising:

obtaining a temperature reading for the solid state memory module;

determining a counter increment value for a counter, wherein the counter is associated with a block in the solid state memory module, and wherein the counter increment value is determined using the temperature reading;

updating a counter value for the counter using the counter increment value to obtain an updated counter value;

making a determination that the updated counter value exceeds a threshold; and

in response to the determination, performing a preventative operation.

2. The method of claim 1 , further comprising:

resetting the counter after the preventative operation is performed to a default value.

3. The method of claim 1 ,

wherein the block comprises data; and

wherein the updated counter value is a temperature modified retention time for the block.

4. The method of claim 3 ,

wherein the threshold is an integrity threshold; and

wherein the preventative operation is a garbage collection operation.

5. The method of claim 1 ,

wherein the block is an erased block; and

wherein the updated counter value is a temperature modified erase time for the block.

6. The method of claim 5 ,

wherein the threshold is an erase bake threshold; and

wherein the preventative operation is a re-erase operation.

7. The method of claim 1 , wherein the threshold is determined using a default temperature and the temperature reading is above or below the default temperature.

8. The method of claim 1 , wherein the temperature reading is a composition temperature reading derived from two or more separate temperature readings associated with the solid state memory module.

9. A storage module, comprising:

a storage module controller;

a plurality of solid state memory modules; and

a plurality of temperature sensors,

wherein the storage module controller is configured to:

obtain a composition temperature reading for a solid state memory module of the plurality of solid state memory modules based on plurality of temperature readings from the plurality of temperature sensors;

determine a counter increment value for a counter, wherein the counter is associated with a block in the solid state memory module and wherein the counter increment value is determined using the composite temperature reading;

update a counter value for the counter using the counter increment value to obtain an updated counter value;

make a determination that the updated counter value exceeds a threshold;

in response to the determination, perform a preventative operation; and

reset the counter after the preventative operation is performed.

10. The storage module of claim 9 ,

wherein the block comprises data; and

wherein the updated counter value is a temperature modified retention time for the block.

11. The storage module of claim 10 ,

wherein the threshold is an integrity threshold; and

wherein the preventative operation is a garbage collection operation.

12. The storage module of claim 9 ,

wherein the block is an erased block; and

wherein the updated counter value is a temperature modified erase time for the block.

13. The storage module of claim 12 ,

wherein the threshold is an erase bake threshold; and

wherein the preventative operation is a re-erase operation.

14. The storage module of claim 9 , wherein the threshold is determined using a default temperature and the composite temperature reading is above or below the default temperature.

15. A non-transitory computer readable medium comprising computer readable program code to:

obtain a temperature reading for a solid state memory module;

determine a counter increment value for a counter, wherein the counter is associated with a block in the solid state memory module and wherein the counter increment value is determined using the temperature reading;

update a counter value for the counter using the counter increment value to obtain an updated counter value;

make a determination that the updated counter value exceeds a threshold, wherein the threshold is determined using an default temperature and the temperature reading is above the default temperature; and

in response to the determination, perform a preventative operation.

16. The non-transitory computer readable medium of claim 15 , wherein the computer readable program code further:

resets the counter after the preventative operation is performed.

17. The non-transitory computer readable medium of claim 15 ,

wherein the block comprises data; and

wherein the updated counter value is a temperature modified retention time for the block.

18. The non-transitory computer readable medium of claim 17 ,

wherein the threshold is an integrity threshold; and

wherein the preventative operation is a garbage collection operation.

19. The non-transitory computer readable medium of claim 15 ,

wherein the block is an erased block; and

wherein the updated counter value is a temperature modified erase time for the block.

20. The non-transitory computer readable medium of claim 19 ,

wherein the threshold is an erase bake threshold; and

wherein the preventative operation is a re-erase operation.

Assignments (8)
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (057758/0286) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 061654/0064 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (058014/0560) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0473 →
RELEASE OF SECURITY INTEREST IN PATENTS PREVIOUSLY RECORDED AT REEL/FRAME (057931/0392) Recorded Jun 10, 2022
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
To: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
Reel/Frame 062022/0382 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 15, 2021
From: LEE, FREDERICK K.H.; DESAI, GIRISH B.; HUDSON, SAMUEL; PROULX, ROBERT J.; RIJO, MICHAEL; THOMPSON, LELAND W.
To: DELL PRODUCTS L.P.
Reel/Frame 058109/0127 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 058014/0560 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 057931/0392 →
SECURITY INTEREST Recorded Oct 6, 2021
From: DELL PRODUCTS L.P.; EMC IP HOLDING COMPANY LLC
To: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A., AS NOTES COLLATERAL AGENT
Reel/Frame 057758/0286 →
SECURITY AGREEMENT Recorded Oct 1, 2021
From: DELL PRODUCTS, L.P.; EMC IP HOLDING COMPANY LLC
To: CREDIT SUISSE AG, CAYMAN ISLANDS BRANCH
Reel/Frame 057682/0830 →
Continuity (1)
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