System management mode emulation of the real-time clock
An information handling system sets up at power-on self-test, a system management interrupt based on a trap on an input/output port used for a real-time clock and detects at runtime, an operation on the input/output port. In response to detecting the operation on the input/output port, generates the system management interrupt based on the trap on the input/output port. In addition, the information handling system handles the system management interrupt by emulating the real-time clock according to the operation on the input/output port that includes determining a register that is mapped to an index associated with the operation and accessing the register and executing a function associated with the register.
1. A method comprising:
setting up, by a basic input and output system during power-on self-test, a system management interrupt based on a trap on an input/output port used for a real-time clock;
detecting, at runtime, an operation on the input/output port;
in response to the detecting the operation on the input/output port, generating the system management interrupt based on the trap on the input/output port; and
handling the system management interrupt by emulating the real-time clock according to the operation on the input/output port, wherein the handling of the system management interrupt includes:
determining a register that is mapped to an index associated with the operation;
accessing the register and executing a function associated with the register; and
setting a non-maskable interrupt based on bit seven of data received with the operation on the input/output port.
2. The method of claim 1 , wherein the operation on the input/output port is either a read operation or a write operation.
3. The method of claim 1 , wherein the handling of the system management interrupt is further based on the data associated with the operation on the input/output port.
4. The method of claim 1 , the method further comprising executing the function associated with the register using a baseboard management controller.
5. The method of claim 1 , the method further comprising:
reading, during the power-on self-test, a first date/time from a timer of an information handling system;
storing the first date/time at a system management mode buffer;
storing a reference offset date/time from the timer; and
determining a current real-time clock date/time based on the first date/time stored at the system management mode buffer and an elapsed date/time since the power-on self-test based on the reference offset date/time, in response to a request for the current real-time clock date/time.
6. The method of claim 1 , the method further comprising setting the bit seven of the data to zero and return value of the index.
7. An information handling system, comprising:
an input/output port for a real-time clock; and
a basic input/output system configured to:
set up, during power-on self-test, a system management interrupt based on a trap on the input/output port for the real-time clock;
detect, during a runtime, an operation on the input/output port used for the real-time clock;
generate the system management interrupt based on the trap on the input/output port, in response to the detection of the operation on the input/output port; and
handle the system management interrupt by emulating the real-time clock, wherein the basic input/output system further configured to:
determine a register that is mapped to an index associated with the operation;
access the register and executing a function associated with the register;
set bit seven of data to zero and return value of the index; and
set a non-maskable interrupt based on bit seven of data received with the operation on the input/output port.
8. The information handling system of claim 7 , wherein the operation on the input/output port is either a read operation or a write operation.
9. The information handling system of claim 7 , wherein the handling of the system management interrupt is further based on data associated with the operation on the input/output port.
10. The information handling system of claim 7 , wherein the basic input/output system is further configured to:
read, during the power-on self-test, a first date/time from a timer of the information handling system;
store the first date/time at a system management mode buffer;
store a reference offset date/time from the timer; and
determine a current real-time clock date/time based on the first date/time stored at the system management mode buffer and an elapsed date/time since the power-on self-test based on the reference offset date/time, in response to a request for the current real-time clock date/time.
11. The information handling system of claim 10 , wherein the timer is a high precision event timer.
12. The information handling system of claim 7 , wherein the handling of the system management interrupt is further based on the data associated with the operation on the input/output port.
13. The information handling system of claim 7 , the basic input/output system is further configured to execute the function associated with the register using a baseboard management controller.
14. A non-transitory computer-readable medium including code that when executed causes a processor to perform a method, the method comprising:
setting up, during a power-on self-test, a system management interrupt based on a trap on an input/output port used for a real-time clock;
detecting, during runtime, an operation on the input/output port;
generating the system management interrupt based on the trap on the input/output port, in response to the detecting the operation on the input/output port; and
handling the system management interrupt by emulating the real-time clock according to the operation on the input/output port, wherein the handling of the system management interrupt includes:
determining a register that is mapped to an index associated with the operation;
accessing the register and executing a function associated with the register; and
setting a non-maskable interrupt based on bit seven of data received with the operation on the input/output port.
15. The non-transitory computer-readable medium of claim 14 , wherein the operation on the input/output port is either a read operation or a write operation.
16. The non-transitory computer-readable medium of claim 14 , wherein the handling of the system management interrupt is further based on the data associated with the operation on the input/output port.
17. The non-transitory computer-readable medium of claim 14 , the method further comprising executing the function associated with the register using a baseboard management controller.
18. The non-transitory computer-readable medium of claim 14 , the method further comprising:
reading, during the power-on self-test, a first date/time from a timer of an information handling system;
storing the first date/time at a system management mode buffer;
storing a reference offset date/time from the timer; and
determining a current real-time clock date/time based on the first date/time stored at the system management mode buffer and an elapsed date/time since the power-on self-test based on the reference offset date/time, in response to a request for the current real-time clock date/time.
19. The non-transitory computer-readable medium of claim 18 , wherein the timer is a high precision event timer.
20. The non-transitory computer-readable medium of claim 14 , the method further comprising setting the bit seven of the data to zero and return value of the index.