IP Library Granted Patent US 11,626,802
Granted Patent B2
US 11,626,802 · App. 17/389,347 · Granted Apr 11, 2023

Detection circuit and DC-DC converter

Inventor: Yoshiomi Shiina (Tokyo, JP)
Assignee: ABLIC Inc.
H02M3/1588G01R19/14H02M1/0009
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Quick Facts
Patent No.
US 11,626,802
App. No.
17/389,347
Granted
Apr 11, 2023
Kind
B2
Abstract

A DC-DC converter of a synchronous rectification type includes a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor. The backflow detection circuit includes a first-stage differential input circuit including a first transistor, a first resistor, a second transistor, a second resistor and a fifth transistor, and a second-stage differential input circuit including a third transistor and a fourth transistor. The fifth transistor is of a same conductive type as the synchronous rectification transistor and contains a drain connected to the other end of the first resistor with respect to an end connected to the first transistor.

Claims (14)

1. A detection circuit which includes two input terminals to be connected to a synchronous rectification transistor, and which detects a reverse current based on a voltage across the synchronous rectification transistor, the detection circuit comprising:

a first-stage differential input circuit including a first input port as one of the two input terminals, a second input port as the other one of the two input terminals, a first transistor containing a gate connected to the first input port, a first resistor containing first and second ends, the first end being connected in series with the first transistor, a second transistor containing a gate connected to the second input port, a second resistor connected in series with the second transistor, and a fifth transistor being of a same conductive type as the synchronous rectification transistor, the fifth transistor containing a drain connected to the second end of the first resistor; and

a second-stage differential input circuit including a third transistor containing a gate connected to a node between the first transistor and the first resistor, and a fourth transistor containing a gate connected to a node between the second transistor and the second resistor.

2. The detection circuit according to claim 1 , wherein the fifth transistor contains a gate connected to a bias circuit configured to supply a predetermined bias voltage.

3. The detection circuit according to claim 1 , wherein the fifth transistor contains a gate connected to a terminal to which a power supply voltage is supplied.

4. The detection circuit according to claim 3 , wherein the fifth transistor is an NMOS transistor containing the gate connected to the terminal, and wherein the terminal is a power supply terminal to which a voltage higher than a ground voltage is supplied as the power supply voltage.

5. The detection circuit according to claim 3 , wherein the fifth transistor is a PMOS transistor containing the gate connected to the terminal, and wherein the terminal is a ground terminal to which a ground voltage is supplied as the power supply voltage.

6. A DC-DC converter of a synchronous rectification type including a synchronous rectification transistor and a backflow detection circuit which detects a reverse current based on a voltage across the synchronous rectification transistor, the backflow detection circuit comprising:

a first-stage differential input circuit including a first input port, a second input port, a first transistor containing a gate connected to the first input port, a first resistor containing first and second ends, the first end being connected in series with the first transistor, a second transistor containing a gate connected to the second input port, a second resistor connected in series with the second transistor, and a fifth transistor being of a same conductive type as the synchronous rectification transistor, the fifth transistor containing a drain connected to the second end of the first resistor; and

a second-stage differential input circuit including a third transistor containing a gate connected to a node between the first transistor and the first resistor, and a fourth transistor containing a gate connected to a node between the second transistor and the second resistor.

7. The DC-DC converter according to claim 6 , wherein the fifth transistor contains a gate connected to a bias circuit configured to supply a predetermined bias voltage.

8. The DC-DC converter according to claim 6 , wherein the fifth transistor contains a gate connected to a terminal to which a power supply voltage is supplied.

9. The DC-DC converter according to claim 8 , wherein the fifth transistor is an NMOS transistor containing the gate connected to the terminal, and wherein the terminal is a power supply terminal to which a voltage higher than a ground voltage is supplied as the power supply voltage.

10. The DC-DC converter according to claim 8 , wherein the fifth transistor is a PMOS transistor containing the gate connected to the terminal, and wherein the terminal is a ground terminal to which a ground voltage is supplied as the power supply voltage.

Assignments (2)
CHANGE OF ADDRESS Recorded Jun 8, 2023
From: ABLIC INC.
To: ABLIC INC.
Reel/Frame 064021/0575 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 2, 2021
From: SHIINA, YOSHIOMI
To: ABLIC INC.
Reel/Frame 057059/0057 →