IP Library Granted Patent US 11,770,982
Granted Patent B1
US 11,770,982 · App. 17/397,015 · Granted Sep 26, 2023

Microwave integrated quantum circuits with cap wafers and their methods of manufacture

Inventors: Jayss Daniel Marshall (Fair Oaks, CA); Chih-Yang Li (Menlo Park, CA); Biswajit Sur (San Jose, CA); Nagesh Vodrahalli (Los Altos, CA); Mehrnoosh Vahidpour (El Cerrito, CA); William Austin O'Brien, IV (Sylmar, CA); Andrew Joseph Bestwick (Berkeley, CA); Chad Tyler Rigetti (Walnut Creek, CA); James Russell Renzas (San Mateo, CA)
Assignee: Rigetti & Co, LLC
H10N60/805G06N10/00H01L24/11H01L24/13H01L24/16H01L24/81H10N60/0156H10N60/0912H10N60/85H01L2224/1146H01L2224/11452H01L2224/1318H01L2224/13082H01L2224/13083H01L2224/13084H01L2224/13109H01L2224/13124H01L2224/13164H01L2224/13166H01L2224/13179H01L2224/13183H01L2224/13184H01L2224/16238H01L2224/81193H01L2224/81815H01L2924/1432
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Quick Facts
Patent No.
US 11,770,982
App. No.
17/397,015
Granted
Sep 26, 2023
Kind
B1
Abstract

In a general aspect, an integrated quantum circuit includes a first substrate and a second substrate. The first substrate includes a first surface and a recess formed in the first substrate along the first surface. The recess has a recess surface and is configured to enclose a quantum circuit element. The first substrate includes a first electrically-conductive layer disposed on the first surface and covering at least a portion of the recess surface. The first electrically-conductive layer includes a first superconducting material. The second substrate includes a second surface and a quantum circuit element. The second substrate includes a second electrically-conductive layer on the second surface that includes a second superconducting material. The first substrate is adjacent the second substrate to enclose the quantum circuit device within the recess. The first electrically-conductive layer of the first substrate is electrically-coupled to the second electrically-coupled layer of the second substrate.

Claims (32)

1. A method of fabricating an integrated quantum circuit, the method comprising:

forming a recess in a first substrate along a first surface thereof, the recess having a recess surface and configured to enclose a quantum circuit device;

depositing a first electrically-conductive layer over the first surface of the first substrate and at least a portion of the recess surface, the first electrically-conductive layer comprising a first superconducting material;

depositing a second electrically-conductive layer over a second surface of a second substrate, the second electrically-conductive layer comprising a second superconducting material;

forming the quantum circuit device on the second substrate, the quantum circuit device disposed on and contacting the second surface of the second substrate; and

assembling the first substrate to the second substrate to:

enclose the quantum circuit device of the second substrate within the recess of the first substrate; and

electrically couple the first electrically-conductive layer with the second electrically-conductive layer.

2. The method of claim 1 , wherein depositing the first electrically-conductive layer comprises patterning the first electrically-conductive layer.

3. The method of claim 1 , wherein depositing the first electrically-conductive layer comprises depositing a plurality of layers to form a first multi-layer stack, at least one of the plurality of layers formed of the first superconducting material.

4. The method of claim 1 , wherein depositing the first electrically-conductive layer comprises:

depositing a first layer of niobium over the first surface of the first substrate and at least the portion of the recess surface, the niobium corresponding to the first superconducting material; and

depositing a layer of an alloy of molybdenum and rhenium over the first layer of niobium.

5. The method of claim 4 , comprising:

prior to depositing the layer of an alloy of molybdenum and rhenium,

depositing a layer of an alloy of titanium and tungsten over the first layer of niobium;

depositing a second layer of niobium over the layer of the alloy of titanium and tungsten; and

wherein the layer of the alloy of molybdenum and rhenium is deposited over the second layer of niobium.

6. The method of claim 1 , wherein depositing the second electrically-conductive layer comprises patterning the second electrically-conductive layer.

7. The method of claim 1 , wherein depositing the second electrically-conductive layer comprises depositing a plurality of layers to form a second multi-layer stack, at least one of the plurality of layers formed of the second superconducting material.

8. The method of claim 1 , wherein depositing the first electrically-conductive layer comprises:

depositing a layer of niobium over the second surface of the second substrate, the niobium corresponding to the second superconducting material; and

depositing a layer of an alloy of molybdenum and rhenium over the layer of niobium.

9. The method of claim 1 , comprising:

electrically-coupling the first electrically-conductive layer with the second electrically-conductive layer through a third superconducting material.

10. The method of claim 9 , wherein electrically-coupling the first electrically-conductive layer with the second electrically-conductive layer comprises:

depositing a patterned layer of the third superconducting material over the first electrically-conductive layer of the first substrate; and

contacting the patterned layer of the third superconducting material with the second electrically-conductive layer of the second substrate.

11. The method of claim 9 , wherein electrically-coupling the first electrically-conductive layer with the second electrically-conductive layer comprises:

coupling a bump of the third superconducting material to the first electrically-conductive layer of the first substrate; and

contacting the bump of the third superconducting material with the second electrically-conductive layer of the second substrate.

12. The method of claim 9 , wherein the third superconducting material comprises indium.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC
Reel/Frame 069603/0771 →
RELEASE OF SECURITY INTEREST Recorded Dec 12, 2024
From: TRINITY CAPITAL INC.
To: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
Reel/Frame 069603/0831 →
AMENDED AND RESTATED INTELLECTUAL PROPERTY SECURITY AGREEMENT Recorded Jul 8, 2024
From: RIGETTI & CO, LLC; RIGETTI INTERMEDIATE LLC; RIGETTI COMPUTING, INC.
To: TRINITY CAPITAL INC.
Reel/Frame 068146/0416 →
CHANGE OF NAME Recorded Apr 12, 2023
From: RIGETTI & CO, INC.
To: RIGETTI & CO, LLC
Reel/Frame 063308/0804 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2021
From: MARSHALL, JAYSS DANIEL; LI, CHIH-YANG; SUR, BISWAJIT; VODRAHALLI, NAGESH; VAHIDPOUR, MEHRNOOSH; O'BRIEN, WILLIAM AUSTIN, IV; BESTWICK, ANDREW JOSEPH; RIGETTI, CHAD TYLER; RENZAS, JAMES RUSSELL
To: RIGETTI & CO, INC.
Reel/Frame 057121/0245 →