IP Library Granted Patent US 11,302,811
Granted Patent B2
US 11,302,811 · App. 17/416,294 · Granted Apr 12, 2022

Silicon carbide power device with MOS structure and stressor

Inventors: Marco Bellini (Schlieren, CH); Lars Knoll (Hägglingen, CH); Lukas Kranz (Zürich, CH)
Assignee: Hitachi Energy Switzerland AG
H01L29/7843H01L29/1095H01L29/1608H01L29/7395H01L29/7802
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Quick Facts
Patent No.
US 11,302,811
App. No.
17/416,294
Granted
Apr 12, 2022
Kind
B2
Abstract

A silicon carbide power device, e.g., a vertical power MOSFET or an IGBT, includes a silicon carbide wafer. A first stressor and a second stressor are arranged in the silicon carbide wafer at a first main side. A first channel region, a first portion of a drift layer and a second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction. A stress can be introduced by the first stressor and the second stressor in the first channel region and in the second channel region.

Claims (50)

1. A silicon carbide power device, wherein the silicon carbide power device is a vertical power MOSFET or an IGBT and comprises a silicon carbide wafer having a first main side and a second main side opposite to the first main side, the silicon carbide wafer comprising:

a first channel region of a first conductivity type;

a first source region of a second conductivity type different from the first conductivity type, wherein the first source region is arranged on a first lateral side of the first channel region in a first lateral direction parallel to the first main side;

a drift layer of the second conductivity type, a first portion of the drift layer being arranged on a second lateral side of the first channel region, wherein the second lateral side is opposite to the first lateral side and wherein a second portion of the drift layer-extends from the first portion towards the second main side;

a first base layer of the first conductivity type separating the first source region from the drift layer;

a second channel region of the first conductivity type arranged on the second lateral side of the first channel region and laterally separated from the first channel region by the first portion of the drift layer;

a second source region of the second conductivity type, wherein the second source region and the first portion of the drift layer are arranged on opposite lateral sides of the second channel region;

a second base layer of the first conductivity type separating the second source region from the drift layer;

a gate insulation layer arranged to extend on the first main side to overlap the first channel region and the second channel region, wherein the gate insulation layer is directly on the first channel region and on the second channel region;

a conductive gate layer directly on the gate insulation layer, so that the gate layer is separated from the first channel region and from the second channel region by the gate insulation layer;

a first stressor arranged in the silicon carbide wafer at the first main side; and

a second stressor arranged in the silicon carbide wafer at the first main side, wherein the first channel region, the first portion of the drift layer and the second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction, such that a stress is introduced by the first stressor and the second stressor in the first channel region and in the second channel region.

2. A silicon carbide power device, wherein the silicon carbide power device is a vertical power MOSFET or an IGBT and comprises a silicon carbide wafer having a first main side and a second main side opposite to the first main side, the silicon carbide wafer comprising:

a first channel region of a first conductivity type;

a first source region of a second conductivity type different from the first conductivity type, wherein the first source region is arranged on a first lateral side of the first channel region in a first lateral direction parallel to the first main side;

a drift layer of the second conductivity type, a first portion of the drift layer being arranged on a second lateral side of the first channel region, wherein the second lateral side is opposite to the first lateral side and wherein a second portion of the drift layer extends from the first portion towards the second main side;

a first base layer of the first conductivity type separating the first source region from the drift layer;

a second channel region of the first conductivity type arranged on the second lateral side of the first channel region and laterally separated from the first channel region by the first portion of the drift layer;

a second source region of the second conductivity type, wherein the second source region and the first portion of the drift layer are arranged on opposite lateral sides of the second channel region;

a second base layer of the first conductivity type separating the second source region from the drift layer;

a gate insulation layer arranged to extend on the first main side to overlap the first channel region and the second channel region, wherein the gate insulation layer is directly on the first channel region and on the second channel region and wherein the gate insulation layer is a silicon oxide layer;

a conductive gate layer directly on the gate insulation layer, so that the gate layer is separated from the first channel region and from the second channel region by the gate insulation layer;

a first stressor arranged in the silicon carbide wafer at the first main side; and

a second stressor arranged in the silicon carbide wafer at the first main side, wherein the first channel region, the first portion of the drift layer and the second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction, such that a stress is introduced by the first stressor and the second stressor in the first channel region and in the second channel region.

3. The silicon carbide power device according to claim 1 , wherein the first stressor is in direct contact with the first channel region.

4. The silicon carbide power device according to claim 1 , wherein the first stressor comprises an oxide.

5. A silicon carbide power device, wherein the silicon carbide power device is a vertical power MOSFET or an IGBT and comprises a silicon carbide wafer having a first main side and a second main side opposite to the first main side, the silicon carbide wafer comprising:

a first channel region of a first conductivity type;

a first source region of a second conductivity type different from the first conductivity type, wherein the first source region is arranged on a first lateral side of the first channel region in a first lateral direction parallel to the first main side;

a drift layer of the second conductivity type, a first portion of the drift layer being arranged on a second lateral side of the first channel region, wherein the second lateral side is opposite to the first lateral side and wherein a second portion of the drift layer extends from the first portion towards the second main side;

a first base layer of the first conductivity type separating the first source region from the drift layer;

a second channel region of the first conductivity type arranged on the second lateral side of the first channel region and laterally separated from the first channel region by the first portion of the drift layer;

a second source region of the second conductivity type, wherein the second source region and the first portion of the drift layer are arranged on opposite lateral sides of the second channel region;

a second base layer of the first conductivity type separating the second source region from the drift layer;

a gate insulation layer arranged to extend on the first main side to overlap the first channel region and the second channel region, wherein the gate insulation layer is directly on the first channel region and on the second channel region;

a conductive gate layer directly on the gate insulation layer, so that the gate layer is separated from the first channel region and from the second channel region by the gate insulation layer;

a first stressor arranged in the silicon carbide wafer at the first main side, wherein the first stressor is electrically non-conductive; and a second stressor arranged in the silicon carbide wafer at the first main side, wherein the first channel region, the first portion of the drift layer and the second channel region are laterally arranged between the first stressor and the second stressor in a second lateral direction parallel to the first main side and perpendicular to the first lateral direction, such that a stress is introduced by the first stressor and the second stressor in the first channel region and in the second channel region.

6. The silicon carbide power device according to claim 1 , wherein the stress in the first channel region has an absolute value that is at least 0.5 GPa.

7. The silicon carbide power device according to claim 1 , wherein a distance between the first stressor and the first channel region is less than 10 μm or less than 5 μm.

8. The silicon carbide power device according to claim 1 , wherein the first stressor extends from the first main side to a depth of at least 50 nm, extends at least 100 nm in the first lateral direction and extends at least 100 nm in the second lateral direction perpendicular to the first lateral direction.

9. The silicon carbide power device according to claim 1 , wherein the first stressor and the second stressor are in direct contact with the first channel region, the first portion of the drift layer and the second channel region.

10. The silicon carbide power device according to claim 1 , wherein the first channel region, the second channel region, the first stressor and the second stressor are arranged in a configuration with mirror symmetry relative to a plane perpendicular to the first main side and extending between the first channel region and the second channel region.

11. The silicon carbide power device according to claim 1 , wherein the first stressor is connected to the first channel region by a continuous silicon carbide region.

12. The silicon carbide power device according to claim 1 , wherein the first stressor comprises a nitride.

13. The silicon carbide power device according to claim 12 , wherein the first stressor comprises silicon nitride.

14. The silicon carbide power device according to claim 12 , wherein the first stressor comprises aluminum nitride.

15. The silicon carbide power device according to claim 1 , wherein the first stressor comprises a ceramic compound.

16. The silicon carbide power device according to claim 6 , wherein the stress in the first channel region has an absolute value that is at least 0.7 GPa.

17. The silicon carbide power device according to claim 7 , wherein a distance between the first stressor and the first channel region is less than 5 μm.

18. The silicon carbide power device according to claim 17 , wherein a distance between the first stressor and the first channel region is less than 2.5 μm.

Assignments (3)
MERGER Recorded Nov 13, 2023
From: HITACHI ENERGY SWITZERLAND AG
To: HITACHI ENERGY LTD
Reel/Frame 065548/0905 →
CHANGE OF NAME Recorded Dec 31, 2021
From: ABB POWER GRIDS SWITZERLAND AG
To: HITACHI ENERGY SWITZERLAND AG
Reel/Frame 058601/0692 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 4, 2021
From: BELLINI, MARCO; KNOLL, LARS; KRANZ, LUKAS
To: ABB POWER GRIDS SWITZERLAND AG
Reel/Frame 057078/0541 →