TRANSMIT AND RECEIVE CHANNEL SWAP FOR INFORMATION HANDLING SYSTEMS,
An apparatus includes an interface with a plurality of channels; a multiplexer coupled to the interface and configured to couple transmit circuitry to a first channel mapped as a transmit path in a channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration; and a controller coupled to the multiplexer. The controller may be configured to perform the steps including determining a figure of merit of at least one channel of the plurality of channels of the interface; determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface; and controlling the multiplexer to couple transmit circuitry to the first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to the second channel mapped as a receive path in the channel configuration for dynamic channel swap(s).
1 . A method, comprising:
determining, by an information handling system, a first figure of merit of at least one channel of a plurality of channels coupled to an interface;
determining, by the information handling system based on the first figure of merit, a channel configuration mapping transmit and receive paths to the plurality of channels of the interface; and
controlling, by the information handling system based on the channel configuration, a multiplexer to couple transmit circuitry to a first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration.
2 . The method of claim 1 , wherein the controlling the multiplexer to couple transmit circuitry to the first channel comprises controlling the multiplexer to couple a driver of the transmit circuitry to a first terminal directly connected to the first channel.
3 . The method of claim 1 , wherein the controlling the multiplexer to couple transmit circuitry to the first channel and to couple receive circuitry to the second channel is performed before link training.
4 . The method of claim 1 , wherein the controlling the multiplexer to couple transmit circuitry to the first channel and to couple receive circuitry to the second channel is performed by a basic input/output system (BIOS) of the information handling system, the method further comprising: controlling, by the BIOS through a baseboard management controller (BMC) of the information handling system, a second multiplexer at an endpoint device coupled to the first channel and the second channel based on the channel configuration.
5 . The method of claim 4 , wherein the controlling the multiplexer by the BIOS comprises controlling a multiplexer coupling a central processing unit (CPU) to the first channel and the second channel, and wherein controlling the second multiplexer by the BMC comprises controlling a peripheral component interconnect express (PCIe) device.
6 . The method of claim 1 , wherein determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface based on the first figure of merit comprises determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface based on at least one of a physical bit error rate, a margin measurement, a signal timing, a signal-to-noise ratio (SNR), a bathtub measurement, an Eye-diagram characteristics, or a sensitivity of the first channel.
7 . An apparatus, comprising:
an interface configured to couple to a plurality of channels;
a multiplexer coupled to the interface and configured to couple transmit circuitry to a first channel mapped as a transmit path in a channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration; and
a controller coupled to the multiplexer, wherein the controller is configured to perform steps comprising:
determining, by an information handling system, a first figure of merit of at least one channel of a plurality of channels coupled to an interface;
determining, by the information handling system based on the first figure of merit, a channel configuration mapping transmit and receive paths to the plurality of channels of the interface; and
controlling, by the information handling system based on the channel configuration, a multiplexer to couple transmit circuitry to a first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration.
8 . The apparatus of claim 7 , wherein the controlling the multiplexer to couple transmit circuitry to the first channel comprises controlling the multiplexer to couple a driver of the transmit circuitry to a first terminal directly connected to the first channel.
9 . The apparatus of claim 7 , wherein determining the channel configuration mapping transmit and receive paths to the plurality of the channels of the interface based on the first figure of merit comprises determining the channel configuration based on at least one of a physical bit error rate, a margin measurement, a signal timing, a signal-to-noise ratio (SNR), a bathtub measurement, an eye-diagram characteristics, or a sensitivity of the first channel.
10 . The apparatus of claim 7 , wherein the first channel and the second channel comprise a first set of channels and a second set of channels, wherein the first set of channels and the second set of channels are coupled by an I/O switch based on the transmit path and the receive path.
11 . The apparatus of claim 7 , wherein the interface comprises a package terminal array.
12 . The apparatus of claim 7 , wherein the controller is configured to perform the controlling the multiplexer to couple transmit circuitry to the first channel and to couple receive circuitry to the second channel is performed before link training.
13 . The apparatus of claim 7 , wherein the controller is a basic input/output system (BIOS), wherein the basic input/output system (BIOS) is configured to control a baseband management controller (BMC) to control a second multiplexer at an endpoint device coupled to the interface through the first channel and the second channel.
14 . The apparatus of claim 13 , wherein the apparatus comprises a central processing unit (CPU), and wherein the BIOS is configured to control the BMC to control the second multiplexer at a peripheral component interconnect express (PCIe) device.
15 . An information handling system, comprising:
a peripheral component interface (PCI) bus comprising a plurality of channels;
a memory; and
a processor coupled to the memory and comprising a multiplexer coupled to the peripheral connection (PCI) interface bus and configured to couple transmit circuitry to a first channel mapped as a transmit path in a channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration,
wherein the processor is configured to perform steps comprising:
determining, by an information handling system, a first figure of merit of at least one channel of the plurality of channels;
determining, by the information handling system based on the first figure of merit, a channel configuration mapping transmit and receive paths to the plurality of channels; and
controlling, by the information handling system based on the channel configuration, a multiplexer to couple transmit circuitry to a first channel mapped as a transmit path in the channel configuration and to couple receive circuitry to a second channel mapped as a receive path in the channel configuration.
16 . The information handling system of claim 15 , wherein controlling the multiplexer to couple transmit circuitry to the first channel comprises controlling the multiplexer to couple a driver of the transmit circuitry to a first terminal directly connected to the first channel.
17 . The information handling system of claim 15 , wherein determining the channel configuration mapping transmit and receive paths to the plurality of the channels based on the first figure of merit comprises determining the channel configuration mapping transmit and receive paths to the plurality of the channels based on at least one of a physical bit error rate, a margin measurement, a signal timing, a signal-to-noise ratio (SNR), a bathtub measurement, an eye-diagram characteristics, or a sensitivity of the first channel.
18 . The information handling system of claim 15 , controlling the multiplexer to couple transmit circuitry to the first channel and to couple receive circuitry to the second channel is performed before link training.
19 . The information handling system of claim 15 , further comprising a basic input/output system (BIOS) coupled to the processor, wherein the controlling the multiplexer to couple transmit circuitry to the first channel and to couple receive circuitry to the second channel is performed by a basic input/output system (BIOS) of the information handling system.
20 . The information handling system of claim 19 , further comprising an endpoint device comprising a second multiplexer and coupled to the PCI bus through the second multiplexer; and a baseband management controller (BMC) coupled to the BIOS and to the endpoint device, wherein the basic management controller (BMC) is configured to control the second multiplexer based on the channel configuration.