Semiconductor device with isolation layer

1. A semiconductor device, comprising:

a base substrate;

a first well region and a second well region in the base substrate, wherein a conductivity type of the first well region is opposite to a conductivity type of the second well region;

a gate electrode structure, sidewall spacers, a doped source layer and a doped drain layer over the base substrate, wherein:

the sidewall spacers cover sidewalls of the gate electrode structure;

the doped source layer and the doped drain layer are respectively on two sides of the gate electrode structure and the sidewall spacers;

the gate electrode structure and the sidewall spacers are on the first well region and the second well region;

the doped source layer is in the first well region and the doped drain layer is in the second well region; and

a conductivity type of the doped source layer and the doped drain layer is opposite to a conductivity type of the second well region;

a dielectric layer on the base substrate, wherein the dielectric layer covers sidewalls of the sidewall spacers, the doped source layer and the doped drain layer, and exposes a top surface of the gate electrode structure; and

an isolation layer in the dielectric layer, wherein the isolation layer is in the gate electrode structure of the second well region and the base substrate of the second well region, and adjacent to the sidewalls of the sidewall spacer over the second well region.

2. The device according to claim 1 , wherein:

the isolation layer is made of a material including silicon oxide, silicon nitride, silicon oxynitride, silicon oxycarbide, silicon carbonitride and silicon oxycarbonitride.

3. The device according to claim 1 , wherein:

a minimum distance between a sidewall of the isolation layer and the first well region is about 20 nm to about 1000 nm.

4. The device according to claim 1 , wherein:

a minimum distance between a bottom of the isolation layer and a bottom of the second well region is about 20 nm to about 1000 nm.

5. The device according to claim 1 , wherein:

a width of the isolation layer along a direction from the doped source layer to the doped drain layer is about 15 nm to 200 nm.

6. The device according to claim 1 , wherein:

the base substrate includes a semiconductor substrate and a fin on the semiconductor substrate;

the first well region and the second well region are formed in the fin;

the gate electrode structure crosses the fin;

the sidewall spacers are on the fin;

the doped source layer and the doped drain layer are in the fin; and

the dielectric layer covers a top and sidewalls of the fin.

7. The device according to claim 1 , wherein:

the gate electrode structure includes a gate dielectric layer and a gate electrode layer on the gate dielectric layer.

8. The device according to claim 1 , wherein:

the first well region has first ions and the second well region has second ions;

a conductivity type of the first ions is opposite to a conductivity type of the second ions;

when the gate electrode structure is used to form a P-type device, the conductivity type of the first ions is N-type and the first ions include phosphorus ions, arsenic ions or antimony ions;

the conductivity type of the second ions is P-type and the second ions include boron ions, BP 2− ions or indium ions; and

when the gate electrode structure is used to form a N-type device, the conductivity type of the first ions is P-type and the first ions include boron ions, Br 2− ions or indium ions; the conductivity type of the second ions is N-type, and the second ions include phosphorus ions, arsenic ions or antimony ions.

9. The device according to claim 1 , wherein:

the doped source layer and the doped drain layer have source/drain ions;

when the gate electrode structure is used to form a P-type device, the doped source layer and the doped drain layer are made of a material including silicon, germanium and silicon germanium; and the source/drain ions are P-type ions and include boron ions, Br 2− ions or indium ions; and

when the gate electrode structure is used to form a N-type device, the doped source layer and the doped drain layer are made of a material including silicon, gallium arsenide or indium gallium arsenide; and the source/drain ions are N-type ions and include phosphorus ions, arsenic ions or antimony ions.