Inline encryption of packet data in a wireless communication system

1. A wireless communication system comprising:

first memory;

second memory storing application data to be wirelessly transmitted;

a wireless transceiver;

a microprocessor configured to generate respective transmission headers for packets of the application data and store the transmission headers to the first memory;

a direct memory access (DMA) controller;

an encryption engine in-line between the DMA controller and the second memory, wherein the microprocessor is configured to program the DMA controller to transfer the packets of the application data from the second memory to the first memory via the encryption engine,

wherein the encryption engine is configured to receive the packets of the application data, encrypt the packets to generate encrypted application data packets, and output the encrypted application data packets for storage to the first memory at respective storage locations for payloads of the transmission headers, and

wherein the wireless transceiver is configured to wirelessly transmit transmission packets, each of the transmission packets comprising one of the transmission headers and one of the encrypted application data packets.

2. The wireless communication system of claim 1 , wherein the microprocessor is configured to generate a transmission header for each of the packets of the application data, and wherein the transmission packets each comprise one of the encrypted application data packets and a corresponding one of the transmission headers.

3. The wireless communication system of claim 1 , wherein the microprocessor is further configured to:

determine a number of transmission packets to create based on a size of the application data stored in the second memory;

generate respective partially filled transmission headers for the transmission headers; and

store the partially filled transmission headers to the first memory.

4. The wireless communication system of claim 1 , wherein the microprocessor is further configured to generate and store a header table in the first memory, the header table to store a list of addresses that specify locations of the transmission headers in the first memory.

5. The wireless communication system of claim 4 , wherein the microprocessor is configured to program the DMA controller with a descriptor table, the descriptor table specifying (a) a first location in the first memory storing the header table, (b) second locations in the second memory storing the packets of the application data, and (c) a third location in the first memory to store the transmission packets.

6. The wireless communication system of claim 3 ,

wherein the DMA controller is configured to retrieve the partially filled transmission headers from the first memory along with corresponding portions of the application data from the second memory, and

wherein the encryption engine is configured to, for each partially filled transmission header and corresponding portion of the application data, complete the partially filled transmission header with an encryption vector and encrypt the corresponding portion of the application data to create the corresponding transmission packet to store in the first memory.

7. The wireless communication system of claim 1 , wherein the DMA controller is configured to store, in a transmission buffer in the first memory, the transmission packets to be transmitted by the wireless transceiver.

8. The wireless communication system of claim 1 , wherein the microprocessor comprises a first microprocessor, the wireless communication system further comprising:

a second microprocessor configured to, in response to receiving a signal from the first microprocessor indicating that encrypted application data packets are ready to be transmitted, drive a wireless data bus interface to transmit, via the wireless transceiver, the transmission packets.

9. The wireless communication system of claim 8 ,

wherein the microprocessor comprises a first microprocessor,

wherein the transmission packets comprise first transmission packets,

wherein the wireless data bus interface is configured to, in response to receiving second transmission packets, store the second transmission packets at a location in the first memory, and

wherein a second microprocessor is configured to write the location in the first memory of the second transmission packets to a register accessible by the first microprocessor.

10. The wireless communication system of claim 1 ,

wherein the packets of the application data comprise first application data packets,

wherein the microprocessor comprises a first microprocessor,

wherein the transmission packets comprise first transmission packets,

wherein the first microprocessor is configured to program, in response to receiving a signal from a second microprocessor indicating that second transmission packets have been received by the wireless transceiver and are stored in a location in the first memory, the DMA controller with a first address identifying the location in the first memory of the second transmission packets and a second address identifying a second location in the second memory,

wherein the DMA controller is configured to pull the second transmission packets through the encryption engine to generate second application data packets and store the second application data packets at the second location of the second memory, and

wherein the encryption engine is configured to decrypt encrypted application data packets within the second transmission packets.

11. The wireless communication system of claim 10 , wherein the encryption engine is configured to, for each one of the second transmission packets, determine a validity of that second transmission packet based on a transmission header within the second transmission packet.

12. The wireless communication system of claim 11 , wherein in response to determining that one of the second transmission packets is not valid, the encryption engine is configured to send a signal to the first microprocessor and cease processing the second transmission packets.

13. A method comprising:

generating, by a microprocessor, respective transmission headers for packets of application data in a second memory to be wirelessly transmitted;

storing the transmission headers in a first memory;

transferring, by a direct access memory (DMA) controller programmed by the microprocessor, the packets of the application data from the second memory to the first memory via an encryption engine in-line between the DMA controller and the first memory;

receiving, by the encryption engine, the packets of the application data;

encrypting, by the encryption engine, the packets to generate encrypted application data packets;

outputting, by the encryption engine, the encrypted application data packets for storage to the first memory at respective storage locations for payloads of the transmission headers; and

wirelessly transmitting transmission packets, by a wireless transceiver, each of the transmission packets comprising one of the transmission headers and one of the encrypted application data packets.

14. The method of claim 13 , further comprising:

determining, by the microprocessor, a number of transmission packets to create based on a size of the application data stored in the second memory;

generating, by the microprocessor, respective partially filled transmission headers for the transmission headers; and

storing, by the microprocessor, the partially filled transmission headers to the first memory.

15. The method of claim 14 , further comprising:

retrieving, by the DMA controller, the partially filled transmission headers from the first memory along with corresponding portions of the application data from the second memory; and

for each partially filled transmission header and corresponding portion of the application data, completing the partially filled transmission header with an encryption vector and encrypting the corresponding portion of the application data to create the corresponding transmission packet to store in the first memory.

16. The method of claim 15 , further comprising:

pulling from first locations in the first memory, by the DMA controller, the transmission headers to the encryption engine;

pulling from second locations in the second memory, by the DMA controller, the packets of application data to the encryption engine;

completing, by the encryption engine, an encryption block within each of the transmission headers; and

storing in third locations in the first memory, by the DMA controller, the transmission packets.

17. The method of claim 16 , further comprising moving, by the microprocessor, the transmission packets from the third locations in the first memory to a transmission buffer to be transmitted by the wireless transceiver.

18. The method of claim 13 , further comprising:

generating, by the microprocessor, a header table for storage in the first memory, the header table to store a list of addresses that specify locations of the transmission headers in the first memory; and

generating, by the DMA controller, a descriptor table specifying (a) a first location in the first memory storing the header table, (b) second locations in the second memory storing the packets of the application data, and (c) a third location in the first memory to store the transmission packets.

19. The method of claim 18 ,

wherein completing the encryption block within each of the transmission headers further comprises generating, by the encryption engine, an encryption vector based on the corresponding application data packet to be encrypted,

wherein the encryption vector is configured to facilitate, by a receiving device, determining whether the corresponding portion of the application data to be encrypted has been tampered with.

20. A non-transitory computer-readable storage medium comprising program instructions that, when executed by a microprocessor of a wireless communication system, cause the microprocessor to:

generate for storage in a first memory respective transmission headers for packets of application data in a second memory to be wirelessly transmitted;

program a direct access memory (DMA) controller to transfer the packets of the application data from the second memory to the first memory via an encryption engine in-line between the DMA controller and the first memory,

wherein the encryption engine is configured to receive the packets of the application data, encrypt the packets to generate encrypted application data packets, and output the encrypted application data packets for storage to the first memory at respective storage locations for payloads of the transmission headers; and

move the transmission packets from the locations in the first memory to a transmission buffer to be transmitted by a wireless transceiver, each transmission packet comprising one of the transmission headers and one of the encrypted application data packets.