IP Library Granted Patent US 11,960,919
Granted Patent B2
US 11,960,919 · App. 17/464,083 · Granted Apr 16, 2024

Virtual accelerators in a virtualized computing system

Inventors: Bing Niu (Beijing, CN); Jin He (Beijing, CN); Qi Liu (Beijing, CN); Sheng Fang (Beijing, CN); Xiangdong Che (Beijing, CN); Xiangjun Song (Beijing, CN)
Assignee: VMware LLC
G06F9/45558G06F9/44505G06F12/1045G06F13/4022G06F2009/45583
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Quick Facts
Patent No.
US 11,960,919
App. No.
17/464,083
Granted
Apr 16, 2024
Kind
B2
Abstract

An example method of virtualizing a hardware accelerator in a host cluster of a virtualized computing system includes: commanding, at an initiator host in the host cluster, a programmable expansion bus device to reconfigure as a virtual accelerator based on specifications of a hardware accelerator in a target host of the host cluster; executing, in the programmable expansion bus device, software to emulate the virtual accelerator as connected to an expansion bus of the initiator host; receiving, at the programmable expansion bus device, compute tasks from an application executing in the initiator host; and sending, to the target host, the compute tasks for processing by the hardware accelerator.

Claims (40)

1. A method of virtualizing a hardware accelerator in a host cluster of a virtualized computing system, comprising:

commanding, at an initiator host in the host cluster, a programmable expansion bus device to reconfigure as a virtual accelerator based on specifications of a hardware accelerator in a target host of the host cluster;

executing, in the programmable expansion bus device, software to emulate the virtual accelerator as connected to an expansion bus of the initiator host;

receiving, at the programmable expansion bus device, compute tasks from an application executing in the initiator host; and

sending, to the target host, the compute tasks for processing by the hardware accelerator.

2. The method of claim 1 , wherein the programmable expansion bus device comprises a network interface card (NIC) having processing hardware and software executing on the processing hardware.

3. The method of claim 1 , wherein the compute tasks comprise binary code in a first format, and wherein the programmable expansion bus device is configured to translate the binary code from the first format into a second format before sending the compute tasks to the target host.

4. The method of claim 3 , wherein the programmable expansion bus device is configured to cache translations of the compute tasks.

5. The method of claim 1 , wherein the compute tasks comprise binary code in a first format, and wherein the target host is configured to translate the binary code from the first format to a second format.

6. The method of claim 1 , further comprising:

receiving, at the programmable expansion bus device, results from the target host generated by the hardware accelerator in response to performing the compute tasks; and

returning the results to the application.

7. The method of claim 6 , wherein the programmable expansion bus device is configured to cache the results in association with a signature of the compute tasks.

8. A non-transitory computer readable medium comprising instructions to be executed in a computing device to cause the computing device to carry out a method of virtualizing a hardware accelerator in a host cluster of a virtualized computing system, comprising:

commanding, at an initiator host in the host cluster, a programmable expansion bus device to reconfigure as a virtual accelerator based on specifications of a hardware accelerator in a target host of the host cluster;

executing, in the programmable expansion bus device, software to emulate the virtual accelerator as connected to an expansion bus of the initiator host;

receiving, at the programmable expansion bus device, compute tasks from an application executing in the initiator host; and

sending, to the target host, the compute tasks for processing by the hardware accelerator.

9. The non-transitory computer readable medium of claim 8 , wherein the programmable expansion bus device comprises a network interface card (NIC) having processing hardware and software executing on the processing hardware.

10. The non-transitory computer readable medium of claim 8 , wherein the compute tasks comprise binary code in a first format, and wherein the programmable expansion bus device is configured to translate the binary code from the first format into a second format before sending the compute tasks to the target host.

11. The non-transitory computer readable medium of claim 10 , wherein the programmable expansion bus device is configured to cache translations of the compute tasks.

12. The non-transitory computer readable medium of claim 8 , wherein the compute tasks comprise binary code in a first format, and wherein the target host is configured to translate the binary code from the first format to a second format.

13. The non-transitory computer readable medium of claim 8 , further comprising:

receiving, at the programmable expansion bus device, results from the target host generated by the hardware accelerator in response to performing the compute tasks; and

returning the results to the application.

14. The non-transitory computer readable medium of claim 13 , wherein the programmable expansion bus device is configured to cache the results in association with a signature of the compute tasks.

15. A host computer, comprising:

a hardware platform configured to execute an application having compute tasks;

a programmable expansion bus device in the hardware platform, the programmable expansion bus device configured to:

reconfigure as a virtual accelerator based on specifications of a hardware accelerator in a target host in network communication with the host computer;

execute software to emulate the virtual accelerator as connected to an expansion bus of the hardware platform;

receive the compute tasks from the application; and

send, to the target host, the compute tasks for processing by the hardware accelerator.

16. The host computer of claim 15 , wherein the programmable expansion bus device comprises a network interface card (NIC) having processing hardware and software executing on the processing hardware.

17. The host computer of claim 15 , wherein the compute tasks comprise binary code in a first format, and wherein the programmable expansion bus device is configured to translate the binary code from the first format into a second format before sending the compute tasks to the target host.

18. The host computer of claim 17 , wherein the programmable expansion bus device is configured to cache translations of the compute tasks.

19. The host computer of claim 15 , wherein the compute tasks comprise binary code in a first format, and wherein the target host is configured to translate the binary code from the first format to a second format.

20. The host computer of claim 15 , wherein the programmable expansion bus device is configured to:

receive results from the target host generated by the hardware accelerator in response to performing the compute tasks; and

return the results to the application.

Assignments (2)
CHANGE OF NAME Recorded Apr 15, 2024
From: VMWARE, INC.
To: VMWARE LLC
Reel/Frame 067102/0395 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 1, 2021
From: NIU, BING; HE, JIN; LIU, QI; FANG, SHENG; CHE, XIANGDONG; SONG, XIANGJUN
To: VMWARE, INC.
Reel/Frame 057357/0891 →
Priority Claims (1)
WO PCT/CN2021/107116 · Jul 19, 2021 · international
Continuity (1)
Related Publication 20230017676A1 · Jan 19, 2023
Cited By (2)
US 12,355,669 US 12,671,657