IP Library Granted Patent US 11,543,472
Granted Patent B2
US 11,543,472 · App. 17/465,617 · Granted Jan 3, 2023

Magnetic sensor array device optimization

Inventors: James Howard Ellis, Jr. (Lexington, KY); Keith Bryan Hardin (Lexington, KY)
Assignee: LEXMARK INTERNATIONAL, INC.
G01R33/1215G01R33/0094G01R33/072H04L9/0861H04L2209/04
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Quick Facts
Patent No.
US 11,543,472
App. No.
17/465,617
Granted
Jan 3, 2023
Kind
B2
Abstract

A magnetic sensor array device is comprised of an array of magnetic sensors arranged on a common semiconductor substrate to measure the multi-axis magnetic field of an arbitrary sized region at high speed with high spatial resolution and high magnetic resolution. This invention further improves a multi-axis magnetic sensor array device fabricated on a common semiconductor substrate with additional optimizations to provide for variable spatial resolution, variable magnetic resolution, and a novel secret key derivation.

Claims (30)

1. A method of more-than-one column readout by organizing a multi-axis magnetic sensor array into banks of multi-axis sensor columns and banks of multi-axis sensor rows that can be readout at the same time comprising:

selecting one or more first axis or axes of the magnetic sensor array;

selecting one-or-more rows of the magnetic sensor array;

selecting more-than-one one column of the magnetic sensor array;

continuing the readout of the magnetic sensor array by moving to a next bank of columns in the selected rows (one in an upper array half, one in a lower array half), and reading out the sensors in the bank at the same time;

selecting a next row in the lower row array half and second row in the upper row array half and reading out the sensors in the banks of columns;

continuing the process until each row in the lower row array half and each row in the upper row array half are selected and each of the sensors in the banks of columns are readout in a similar manner for the entire array; and

digitizing each sensor selected from the analog measurement to a digital value with a readout channel consisting of at least an amplifier and digitizer.

2. The method of claim 1 where the process continues by moving to a second axis or axes and selecting and reading out sensors in banks of columns and rows.

3. The method of claim 2 where the process continues by moving to a third axis and reading out sensors in banks of columns and rows.

4. The method of claim 3 where multiple readout channels are used to allow readouts in parallel to decrease readout times.

5. The method of claim 4 where one readout channel is used for each of the columns in a bank for each selected row, where one or more rows are selected.

6. The method of claim 5 where each readout channel is output as parallel data or serialized to reduce the signal lines needed to transmit the digital output data.

7. A method of masking one-or-more axis consisting of selectively masking one-or-more axis from an array readout by configuring a register prior to an array measurement and by combining any number of register bits and producing a mask combination of X-Y-Z-axis readouts.

8. A method of selectively masking one-or-more rows from an array readout comprising the steps:

configuring a register with a one-or-more bit value (0 to N) prior to an array measurement and can be changed from measurement to measurement;

calculating a mask for a row by starting a readout at the row selected;

selecting the next row by adding the current value of the row and the value programmed into the register;

determine if the row should be skipped; and

executing the calculations in a loop until all the row measurements are complete.

9. The method of claim 8 where multiple row mask register sets can be provided for array organizations where the rows are divided into sections such as an upper array row half and a lower array row half so that two row mask registers with independent calculations provide a unique row mask for the sections.

10. A method of selectively masking one-or-more columns from an array readout comprising the steps:

configuring a register with one-or-more variable length N-bit mask register codes and one-or-more variable length M-bit mask register bank codes that can be changed from measurement to measurement;

selecting a mask register within a selected bank using the N-bit mask register code;

calculating a mask for a column by starting a readout at the column selected;

selecting the next column using the current value of the column and the value programmed into the register;

determine if the column should be skipped; and

executing the calculations in a loop until all the column measurements are complete.

11. The method of claim 10 where an M-bit mask code is used to select the mask register bank when the number of mask register banks equals the number of array banks.

12. The method of claim 10 where an M-bit mask code is used to select the mask register bank when the number of mask register banks is less than the number of array bank.

Assignments (5)
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0192 →
SECURITY INTEREST Recorded Jan 5, 2026
From: LEXMARK INTERNATIONAL, INC.
To: BANK TRUST COMPANY, NATIONAL ASSOCIATION
Reel/Frame 074202/0293 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: CITIBANK, N.A.
Reel/Frame 073007/0118 →
SECURITY INTEREST Recorded Sep 23, 2025
From: LEXMARK INTERNATIONAL, INC.
To: JEFFERIES FINANCE LLC
Reel/Frame 073007/0346 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 2, 2021
From: ELLIS, JAMES HOWARD, JR; HARDIN, KEITH BRYAN
To: LEXMARK INTERNATIONAL, INC.
Reel/Frame 057376/0181 →