IP Library Granted Patent US 11,811,425
Granted Patent B2
US 11,811,425 · App. 17/480,301 · Granted Nov 7, 2023

Neural network soft information detector in a read channel

Inventors: Iouri Oboukhov (Rochester, MN); Daniel Bedau (San Jose, CA); Richard Galbraith (Rochester, MN); Niranjay Ravindran (Rochester, MN); Weldon Hanson (Rochester, MN); Pradhan Bellam (Rochester, MN)
Assignee: Western Digital Technologies, Inc.
H03M13/4138H03M13/3746G06N3/04G06N7/01H04L1/005
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Quick Facts
Patent No.
US 11,811,425
App. No.
17/480,301
Granted
Nov 7, 2023
Kind
B2
Abstract

Example systems, read channels, and methods provide bit value detection from an encoded data signal using a neural network soft information detector. The neural network detector determines a set of probabilities for possible states of a data symbol from the encoded data signal. A soft output detector uses the set of probabilities for possible states of the data symbol to determine a set of bit probabilities that are iteratively exchanged as extrinsic information with an iterative decoder for making decoding decisions. The iterative decoder outputs decoded bit values for a data unit that includes the data symbol.

Claims (80)

1. A read channel circuit, comprising:

a neural network detector configured to:

receive a data symbol, wherein the data symbol includes a plurality of unknown bits;

determine a set of probabilities for possible states of the data symbol; and

output the set of probabilities for possible states of the data symbol;

a soft output detector configured to:

receive the set of probabilities for possible states of the data symbol to populate a decision matrix; and

output, based on the decision matrix, a set of bit probabilities for bits of a data unit that includes the data symbol; and

an iterative decoder configured to:

iteratively calculate, based on feedback of soft information, bit values based on the set of bit probabilities for the bits of the data unit; and

output decoded bit values for the data unit that includes the data symbol.

2. The read channel circuit of claim 1 , wherein the neural network detector includes a plurality of weight coefficients trained to decode an analog representation of the data symbol.

3. The read channel circuit of claim 1 , wherein the neural network detector includes a plurality of weight coefficients trained to perform at least one equalization operation on an analog representation of the data symbol.

4. The read channel circuit of claim 1 , wherein the neural network detector includes a plurality of weight coefficients trained to reduce noise correlation in an analog representation of the data symbol.

5. The read channel circuit of claim 1 , wherein the neural network detector is selected from:

a fully connected artificial neural network comprising at least two fully connected layers;

a convolutional neural network comprising:

a plurality of convolutional kernels; and

a fully connected layer; and

a recurrent neural network comprising:

a plurality of recurrent network kernels; and

a fully connected layer.

6. The read channel circuit of claim 1 , wherein the neural network detector comprises:

a plurality of fully connected layers; and

at least one rectifier activation function positioned between adjacent fully connected layers of the plurality of fully connected layers.

7. The read channel circuit of claim 1 , wherein the neural network detector comprises an output layer configured to output a number of probabilities for possible states equal to all possible states for the data symbol.

8. The read channel circuit of claim 1 , wherein:

the soft output detector is further configured to:

support iterations of the iterative decoder;

selectively determine, based on the set of probabilities for possible states of the data symbol, the set of bit probabilities for bits of the data unit that includes the data symbol; and

iteratively exchange extrinsic information with the iterative decoder to provide feedback on soft information; and

the iterative decoder is further configured to determine whether a decoding decision is reached.

9. The read channel circuit of claim 8 , wherein:

the soft output detector is configured as a states probability machine for the neural network detector;

the soft output detector implements an algorithm selected from:

a soft output Viterbi algorithm; and

a BCJR algorithm; and

the iterative decoder implements low-density parity check codes.

10. The read channel circuit of claim 8 , wherein the soft output detector is further configured to

iteratively calculate, based on the extrinsic information from the iterative decoder, the set of bit probabilities.

11. The read channel circuit of claim 8 , wherein the iterative decoder is further configured to decode at least one codeword using the received set of bit probabilities.

12. A data storage device comprising the read channel circuit of claim 1 .

13. A method comprising:

receiving, by a neural network detector, a data symbol, wherein the data symbol includes a plurality of unknown bits;

determining, by the neural network detector, a set of probabilities for possible states of the data symbol;

populating, by a soft output detector, a decision matrix using the set of probabilities for possible states of the data symbol from the neural network detector;

determining, based on the decision matrix, a set of bit probabilities for bits of a data unit that includes the data symbol;

iteratively calculating, by an iterative decoder and based on feedback of soft information, bit values from the set of bit probabilities for the bits of the data unit; and

outputting, by the iterative decoder, decoded bit values for the data unit that includes the data symbol.

14. The method of claim 13 , further comprising:

training the neural network detector to decode an analog representation of the data symbol.

15. The method of claim 13 , further comprising:

training the neural network detector to perform at least one equalization operation on an analog representation of the data symbol.

16. The method of claim 13 , further comprising:

training the neural network detector to reduce noise correlation in an analog representation of the data symbol.

17. The method of claim 13 , further comprising:

receiving, by the soft output detector and from the neural network detector, the set of probabilities for possible states of the data symbol;

selectively determining, by the soft output detector, the set of bit probabilities for the bits of the data unit over a plurality of iterations;

providing the set of bit probabilities to the iterative decoder;

iteratively exchanging, between the soft output detector and the iterative decoder, extrinsic information to provide feedback on soft information; and

determining, by the iterative decoder, whether a decoding decision is reached.

18. The method of claim 17 , further comprising:

iteratively calculating, by the soft output detector and based on the extrinsic information from the iterative decoder, the set of bit probabilities.

19. The method of claim 13 , wherein the soft output detector is configured as a states probability machine for the neural network detector.

20. The method of claim 13 , further comprising:

outputting, by the neural network detector, the set of probabilities for possible states of the data symbol, wherein a number of probabilities in the set of probabilities for possible states of the data symbol is equal to a number of probabilities for all possible states for the data symbol.

21. The method of claim 13 , further comprising:

decoding, by the iterative decoder, at least one codeword using the received set of bit probabilities.

22. A read channel circuit, comprising:

means for:

receiving a signal corresponding to a data symbol, wherein the data symbol includes a plurality of unknown bits;

determining, based on a plurality of trained weight coefficients, a set of probabilities for possible states of the data symbol; and

outputting a signal corresponding to the set of probabilities for possible states of the data symbol;

means for:

populating a decision matrix using the signal corresponding to the set of probabilities for possible states of the data symbol;

determining, based on the decision matrix, a set of bit probabilities for bits of a data unit that includes the data symbol; and

outputting a signal corresponding to the set of bit probabilities for the bits of the data unit; and

means for:

iteratively calculating, based on feedback of soft information, bit values from the signal corresponding to the set of bit probabilities for the bits of the data unit; and

outputting a signal corresponding to decoded bit values for the data unit that includes the data symbol.

Assignments (5)
PATENT COLLATERAL AGREEMENT - A&R LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 064715/0001 →
PATENT COLLATERAL AGREEMENT - DDTL LOAN AGREEMENT Recorded Aug 21, 2023
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A.
Reel/Frame 067045/0156 →
RELEASE OF SECURITY INTEREST AT REEL 058426 FRAME 0815 Recorded Feb 8, 2022
From: JPMORGAN CHASE BANK, N.A.
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 058965/0679 →
SECURITY INTEREST Recorded Dec 9, 2021
From: WESTERN DIGITAL TECHNOLOGIES, INC.
To: JPMORGAN CHASE BANK, N.A., AS AGENT
Reel/Frame 058426/0815 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 21, 2021
From: BEDAU, DANIEL; OBOUKHOV, IOURI; GALBRAITH, RICHARD; RAVINDRAN, NIRANJAY; HANSON, WELDON; BELLAM, PRADHAN
To: WESTERN DIGITAL TECHNOLOGIES, INC.
Reel/Frame 057547/0472 →